Effect of the Lattice Mismatch Between Copper Thin-Film Interconnection and Base Material on the Crystallinity of the Interconnection

2013 ◽  
Author(s):  
Chuanhong Fan ◽  
Ryosuke Furuya ◽  
Osamu Asai ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Seed Layer ◽  
Lattice Mismatch ◽  
Semiconductor Devices ◽  
Base Material ◽  
Diffraction Method ◽  
Copper Thin Film ◽  
New Material ◽  
Electroplated Copper ◽  
Electron Back Scattered Diffraction

In the present study, a new material, ruthenium whose lattice mismatch against copper is about 6%, was used as the seed layer of electroplated copper thin-film interconnections for semiconductor devices. The crystallinity of the copper thin-film interconnections was evaluated through an EBSD (Electron Back-scattered Diffraction) method and it is found that the crystallinity of them is improved drastically compared with those electroplated on the copper seed. The resistance and electro migration (EM) tolerance of the copper interconnections are also improved a lot compared with the interconnections electroplated on copper seed. Based on these results, a new guideline to design highly reliable electroplated copper thin-film interconnection has been established.

Improvement of Thermal Conductivity of Electroplated Copper Interconnections by Controlling Their Crystallinity

2015 ◽  
Author(s):  
Masaru Gotoh ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Thermal Conductivity ◽  
Thermal Properties ◽  
Grain Boundaries ◽  
Joule Heating ◽  
Seed Layer ◽  
Lattice Mismatch ◽  
Copper Thin Film ◽  
Electroplated Copper

Electroplated copper thin films are indispensable for the interconnections in the advanced electronic products, such as TSV (trough silicon via) structures, fine bumps, and thin-film interconnections in various devices and interposers. However, it has been reported that both electrical and mechanical properties of the films vary drastically comparing with those of conventional bulk copper. The main reason for the variation can be attributed to the fluctuation of the crystallinity of grains and grain boundaries in the films. Porous or sparse grain boundaries cause the increase in electrical resistivity and the embrittlement of the films. Thus, the thermal conductivity of the electroplated copper thin films should be varied drastically depending on their micro texture based on Wiedemann-Franz law. Since copper interconnections are used for not only electrical conductor but also thermal heat conductor, it is important to clarify the relationship between the crystallinity and thermal properties of the films. In this study, the local distributions of the crystallinity and physical properties were investigated experimentally. As the result of the temperature distribution due to local Joule heating along an interconnection, it was suggested that the variation in the quality of the grain boundaries in the electroplated copper thin-films caused the non-uniformity of the resistivity and thus, Joule heating in the thin films. In this study, the effect of the seed layer material on the thermal properties of the electroplated copper thin film was investigated. When a Ru seed layer was deposited as a buffer layer between the electroplated copper thin film and the Ta diffusion barrier layer, both the crystallinity and uniformity of grain boundaries in the electroplated copper films were improved since lattice mismatch between copper and the seed layer metal was decreased. The improvement of the crystallinity increased the long-term reliability of the interconnections under the loads of electromigration and stress-induced migration.

Improvement of Thermal Conductivity of Electroplated Copper Thin-Film Interconnections by Controlling Their Micro Texture

2014 ◽  
Author(s):  
Pornvitoo Rittinon ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Thermal Conductivity ◽  
Grain Boundaries ◽  
Diffraction Method ◽  
Electron Back Scatter Diffraction ◽  
High Resistivity ◽  
Copper Thin Film ◽  
Electroplated Copper ◽  
The Relationship

Copper thin films are indispensable for the interconnections in the advanced electronic products, such as TSV (Trough Silicon Via), fine bumps, and thin-film interconnections in various devices and interposers. However, it has been reported that both electrical and mechanical properties of the films vary drastically comparing with those of conventional bulk copper. The main reason for the variation can be attributed to the fluctuation of the crystallinity of grain boundaries in the films. Porous or sparse grain boundaries show very high resistivity and brittle fracture characteristic in the films. Thus, the thermal conductivity of the electroplated copper thin films should be varied drastically depending on their micro texture based on the Wiedemann-Franz’s law. Since the copper interconnections are used not only for the electrical conduction but also for the thermal conduction, it is very important to quantitatively evaluate the crystallinity of the polycrystalline thin-film materials and clarify the relationship between the crystallinity and thermal properties of the films. The crystallinity of the interconnections were quantitatively evaluated using an electron back-scatter diffraction method. It was found that the porous grain boundaries which contain a significant amount of vacancies increase the local electrical resistance in the interconnections, and thus, cause the local high Joule heating. Such porous grain boundaries can be eliminated by control the crystallinity of the seed layer material on which the electroplated copper thin film is electroplated.

Crystallinity Control of Electroplated Interconnections for Improving Their Stability and Lifetime

2016 ◽  
Author(s):  
Jiatong Liu ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Residual Stress ◽  
Grain Boundaries ◽  
Lattice Mismatch ◽  
Bulk Material ◽  
Chemical Properties ◽  
Mechanical Fracture ◽  
Copper Thin Film ◽  
Electroplated Copper

In a three-dimensional (3D) packaging systems, the interconnections which penetrate stacked silicon chips have been employed. Such interconnection structure is called TSV (Through Silicon Via) structure, and the via is recently filled by electroplated copper thin film. The electroplated copper thin films often consist of fine columnar grains and porous grain boundaries with high density of defects which don’t appear in conventional bulk material. This unique micro texture has been found to cause the wide variation of physical and chemical properties of this material. In the TSV structure, the shrinkage of the copper thin film caused by thermal deformation and recrystallization of the unique texture during high-temperature annealing is strictly constrained by surrounding rigid Si and thus, high tensile residual stress remains in the thin film after thermal annealing. High residual stress should give rise to mechanical fracture of the interconnections and the shift of electronic function of thin film devices formed in Si. Therefore, the residual stress in the interconnections should be minimized by controlling the appearance of the porous boundaries during electroplating for assuring the longterm reliability of the interconnections. As the lattice mismatch between Cu and its barrier film (Ta) is as larger as 18%, which is the main reason for the fine columnar structures and porous grain boundaries, it is necessary to control the underlayer crystallinity to improve the crystallinity of electroplated copper thin films. In this study, the effective method for controlling the crystallinity of the underlayer was investigated by improving the atomic configuration in the electroplated copper thin film. The result showed that by controlling the crystallinity of underlayer, crystallinity of electroplated copper thin films can be improved, the mechanical properties of thin films was improved and thus, stability and lifetime of electroplated copper interconnections can be improved.

Low-cycle fatigue testing and thermal fatigue life prediction of electroplated copper thin film for through hole via

2018 ◽  
Vol 82 ◽  
pp. 20-27 ◽  
Author(s):  
Kazuki Watanabe ◽  
Yoshiharu Kariya ◽  
Naoyuki Yajima ◽  
Kizuku Obinata ◽  
Yoshiyuki Hiroshima ◽  
...  
Keyword(s):  
Thin Film ◽  
Life Prediction ◽  
Fatigue Testing ◽  
Low Cycle Fatigue ◽  
Fatigue Life Prediction ◽  
Cycle Fatigue ◽  
Copper Thin Film ◽  
Thermal Fatigue Life ◽  
Electroplated Copper ◽  
Through Hole

J031053 Stress-Induced Migration of Electroplated Copper Thin Film Interconnections

2011 ◽  
Vol 2011 (0) ◽  
pp. _J031053-1-_J031053-3
Author(s):  
Naoki Saito ◽  
Naokazu Murata ◽  
Kinji Tamakawa ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Copper Thin Film ◽  
Electroplated Copper

Effect of the Crystallinity on the Electromigration Resistance of Electroplated Copper Thin-Film Interconnections

2017 ◽  
Vol 139 (2) ◽  
Author(s):  
Takeru Kato ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Activation Energy ◽  
Grain Boundaries ◽  
Joule Heating ◽  
Current Density ◽  
Constant Current ◽  
Maximum Temperature ◽  
Copper Thin Film ◽  
Electroplated Copper ◽  
Low Crystallinity

Dominant factors of electromigration (EM) resistance of electroplated copper thin-film interconnections were investigated from the viewpoint of temperature and crystallinity of the interconnection. The EM test under the constant current density of 7 mA/cm2 was performed to observe the degradation such as accumulation of copper atoms and voids. Formation of voids and the accumulation occurred along grain boundaries during the EM test, and finally the interconnection was fractured at the not cathode side but at the center part of the interconnection. From the monitoring of temperature of the interconnection by using thermography during the EM test, this abnormal fracture was caused by large Joule heating of itself under high current density. In order to investigate the effect of grain boundaries on the degradation by EM, the crystallinity of grain boundaries in the interconnection was evaluated by using image quality (IQ) value obtained from electron backscatter diffraction (EBSD) analysis. The crystallinity of grain boundaries before the EM test had wide distribution, and the grain boundaries damaged under the EM loading mainly were random grain boundaries with low crystallinity. Thus, high density of Joule heating and high-speed diffusion of copper atoms along low crystallinity grain boundaries accelerated the EM degradation of the interconnection. The change of Joule heating density and activation energy for the EM damage were evaluated by using the interconnection annealed at 400 °C for 3 h. The annealing of the interconnection increased not only average grain size but also crystallinity of grains and grain boundaries drastically. The average IQ value of the interconnection was increased from 4100 to 6200 by the annealing. The improvement of the crystallinity decreased the maximum temperature of the interconnection during the EM test and increased the activation energy from 0.72 eV to 1.07 eV. The estimated lifetime of interconnections is increased about 100 times by these changes. Since the atomic diffusion is accelerated by not only the current density but also temperature and low crystallinity grain boundaries, the lifetime of the interconnections under EM loading is a strong function of their crystallinity. Therefore, it is necessary to evaluate and control the crystallinity of interconnections quantitatively using IQ value to assure their long-term reliability.

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