AbstractThe morphology of SiO2/Si interfaces in a semiconductor LOCOS active area grown by several oxidation conditions has been studied, to compare the roughness of the interfaces observed by STM and HRTEM in particular. Samples consisted of typical MOS structures with a polysilicon gate/SiO2/Si(100). Hydrogen terminated Si surfaces were prepared by means of HF dipping for STM observations. The interface roughness of a “dry” oxide observed by HRTEM was slightly larger than that of a “wet” oxide. Good agreement could be found between STM and HRTEM for the wet oxide interfaces. As for the dry oxide interface, it was more difficult to obtain a reproducible STM image than for the wet oxide interface, but the reverse was true for HRTEM. During the HRTEM, high energy electrons damage the sample and reduce the oxide thickness, especially in the wet oxide samples.
