A simple method for extracting average doping concentration in the polysilicon and silicon surface layer near the oxide in polysilicon-gate MOS structures

1994 ◽  
Vol 15 (2) ◽  
pp. 51-53 ◽  
Author(s):  
W.W. Lin
Keyword(s):  
Surface Layer ◽  
Silicon Surface ◽  
Doping Concentration ◽  
Simple Method ◽  
Polysilicon Gate ◽  
Mos Structures

Annealing of oxide fixed charges in scaled polysilicon gate MOS structures

1985 ◽  
Vol 32 (5) ◽  
pp. 918-925 ◽  
Author(s):  
Dah-Bin Kao ◽  
K.C. Saraswat ◽  
J.P. McVittie
Keyword(s):  
Fixed Charges ◽  
Polysilicon Gate ◽  
Mos Structures

Direct UHV-TEM Observation of Palladium Clusters on a Silicon Surface

2004 ◽  
Vol 10 (1) ◽  
pp. 134-138 ◽  
Author(s):  
Masaki Takeguchi ◽  
Kazutaka Mitsuishi ◽  
Miyoko Tanaka ◽  
Kazuo Furuya
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Surface Layer ◽  
Silicon Surface ◽  
Lattice Structure ◽  
Plan View ◽  
Palladium Clusters ◽  
Transmission Electron ◽  
Pd Clusters

About 1 monolayer of palladium was deposited onto a silicon (111) 7 × 7 surface at a temperature of about 550 K inside an ultrahigh vacuum transmission electron microscope, resulting in formation of Pd2Si nanoislands and a 1 × 1 surface layer. Pd clusters created from an excess of Pd atoms on the 1 × 1 surface layer were directly observed byin situplan view high-resolution transmission electron microscopy. When an objective aperture was introduced so that electron diffractions less than 0.20 nm were filtered out, the lattice structure of the 1 × 1 surface with 0.33 nm spacing and the Pd clusters with a trimer shape were visualized. It was found that image contrast of the 1 × 1 lattice on the specific height terraces disappeared, and thereby an atomic structure of the Pd clusters was clearly observed. The appearance and disappearance of the 1 × 1 lattice was explained by the effect of the kinematical diffraction. It was identified that a Pd cluster was composed of three Pd atoms without a centered Si atom, which is consistent with the model proposed previously. The feature of the Pd clusters stuck at the surface step was also described.

The simulation of epitaxy, sublimation, and annealing processes in a 3D silicon surface layer

2001 ◽  
Vol 35 (9) ◽  
pp. 1022-1029 ◽  
Author(s):  
A. V. Zverev ◽  
I. G. Neizvestnyi ◽  
N. L. Shvarts ◽  
Z. Sh. Yanovitskaya
Keyword(s):  
Surface Layer ◽  
Silicon Surface

Decoration of Al Implantation Profiles in 4H-SiC by Bevel Grinding and Dry Oxidation

2019 ◽  
Vol 963 ◽  
pp. 441-444
Author(s):  
Matthias Kocher ◽  
Tobias Erlbacher ◽  
Mathias Rommel ◽  
Anton Bauer
Keyword(s):  
Oxidation Rate ◽  
Doping Concentration ◽  
State Of The Art ◽  
Power Device ◽  
Power Devices ◽  
Simple Method ◽  
Implantation Depth ◽  
Dry Oxidation ◽  
Aluminum Implantation

The possibility to analyze micrometer scaled 2D implantation profiles is essential for improving SiC power devices. Due to the fact that the oxidation rate depends on the doping concentration a rather simple method was developed in order to decorate highly doped (aluminum) implantation profiles. For this purpose, different samples were grinded with a shallow bevel angle and subsequently oxidized. It could be shown that this method allows analyzing the implantation depth of different box-shape implanted samples. Furthermore the ability to distinguish micrometer scaled 2D profiles for a state-of-the-art SiC power device could be shown.

Facet Free Selective Silicon Epitaxy by Rapid Thermal Chemical Vapor Deposition

1998 ◽  
Vol 525 ◽  
Author(s):  
Katherine E. Violette ◽  
Rick Wise ◽  
Chih-Ping Chao ◽  
Sreenath Unnikrishnan
Keyword(s):  
Growth Rate ◽  
Deposition Rate ◽  
Silicon Surface ◽  
Chemical Vapor ◽  
Process Conditions ◽  
Selective Epitaxy ◽  
Silicon Epitaxy ◽  
Surface Mobility ◽  
Polysilicon Gate ◽  
Initial Stage

ABSTRACTA facet-free, selective epitaxy process has been identified using the SiH2CI2 /HCI/H2 chemistry in a commercially available, single-wafer epitaxy reactor. The pre-epitaxy bake required a minimum of 900°C in order to obtain a clean silicon surface with reasonable throughput while preserving the integrity of the shallow trench isolation structures. The epitaxy growth rate ranged from as low as 130Å/rnin at 825°C, 10 torr to as high as 1500 Å/min at 875°C and 70 torr while the deposition rate of polysilicon on polysilicon differed significantly: at 10 torr, the epitaxy growth rate is greater by as much as 50%, and at 70 torr the polysilicon deposition rate is greater by as much as 40%. The facet suppression depended heavily on two things: the undercut beneath the polysilicon gate sidewall insulator and the process pressure. The undercut is believed to be responsible for suppressing the initial stage of facet formation, most probably by completely eliminating lateral overgrowth of the crystal. The process conditions then enable continued facet suppression perhaps by restricting the silicon surface mobility. The sidewall structure and process conditions combine to make a reliably facet-free selective epitaxy process

scholarly journals Применение селективного контакта MoO-=SUB=-x-=/SUB=-/p-Si для оценки деградации приповерхностной области кремния

2020 ◽  
Vol 46 (24) ◽  
pp. 37
Author(s):  
Д.А. Кудряшов ◽  
А.С. Гудовских ◽  
А.А. Максимова ◽  
А.И. Баранов ◽  
А.В. Уваров ◽  
...  
Keyword(s):  
Surface Layer ◽  
Magnetron Sputtering ◽  
Silicon Surface ◽  
Silicon Oxide ◽  
Near Surface ◽  
Type Silicon ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Degree Of Damage ◽  
P Type

The possibility of evaluation the degree of damage to the near-surface layer of p-type silicon using a selective contact based on MoOx/p-Si is shown. A strong sensitivity of the current-voltage characteristics to the states on the silicon surface formed during the deposition of silicon oxide by magnetron sputtering is demonstrated.

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