An Area-Power Efficient Denoising Hardware Architecture for Real EOG Signal

2020 ◽  
Vol 29 (15) ◽  
pp. 2050243
Author(s):  
Gundugonti Kishore Kumar ◽  
Balaji Narayanam

This paper presents an optimized noise reduction hardware architecture for real electrooculogram (EOG) system. The proposed denoise architecture is developed using differential evolution (DE) algorithm. The algorithm design the filter with fewer sign-power-of-two (SPT) terms to optimize the denoise filter hardware with desired frequency response. The proposed denoise filter architecture with a DE coefficient set uses shift and add approach and is implemented in gate-level Verilog HDL. The real EOG denoise filter’s functionality is checked with Altera DSP Builder and synthesized using Cadence RTL compiler. Both FPGA and ASIC synthesis results are compared with the recently published works. The area and power consumption results show that the proposed filter occupies less area and with low power consumption as compared to the existing architectures.

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.


2017 ◽  
Vol 14 (1) ◽  
pp. 277-283
Author(s):  
V Rajmohan ◽  
O. Uma Maheswari

In modern days of VLSI design, speedy operations and low-power consumption is a key requirement for any circuits. When it comes to multipliers, the power efficient multiplier plays an important role. The main aim of this work is to develop the system with faster and less power multiplier for an efficient process by using Baugh-Wooley multipliers. The optimized Baugh-Wooley multiplier consumes least power, area and produces less delay. The proposed architecture is 193× times faster than Conventional array multiplier in the practical applications and 213× times faster than a conventional Baugh-Wooley multiplier. The Improved Baugh-Wooley multiplier consumes the power of 09.02 mW and area of 52426 μm2.


2011 ◽  
Vol 20 (01) ◽  
pp. 15-27 ◽  
Author(s):  
XIAN TANG ◽  
KONG PANG PUN

A novel switched-current successive approximation ADC is presented in this paper with high speed and low power consumption. The proposed ADC contains a new high-accuracy and power-efficient switched-current S/H circuit and a speed-improved current comparator. Designed and simulated in a 0.18-μm CMOS process, this 8-bit ADC achieves 46.23 dB SNDR at 1.23 MS/s consuming 73.19 μW under 1.2 V voltage supply, resulting in an ENOB of 7.38-bit and an FOM of 0.357 pJ/Conv.-step.


2005 ◽  
Vol 870 ◽  
Author(s):  
Michael Hack ◽  
Anna Chwang ◽  
Yeh-Jiun Tung ◽  
Richard Hewitt ◽  
Julie Brown ◽  
...  

AbstractOLEDs are an ideal technology for electronic display applications. They are fabricated by depositing very thin films of organic materials at low temperatures (<100°C) to form bright, vivid power efficient self-emissive light producing elements with fast response times that can be grown on a variety of large area substrates such as glass, plastic or metal foil. These properties make OLEDs ideally suited to enable high information content flexible displays. In particular, the application of phosphorescent OLEDs leads to very low power consumption displays – a key requirement for mobile applications. In this paper we outline our progress towards developing low power consumption, active-matrix flexible OLED (FOLED™) displays. Our work is focused on integrating three critical enabling technologies: high efficiency long-lived top emission phosphorescent OLED (PHOLED™) device technology, flexible active-matrix backplanes, and thin film encapsulation.


2020 ◽  
Author(s):  
SMITA GAJANAN NAIK ◽  
Mohammad Hussain Kasim Rabinal

Electrical memory switching effect has received a great interest to develop emerging memory technology such as memristors. The high density, fast response, multi-bit storage and low power consumption are their...


2020 ◽  
Vol 64 (1-4) ◽  
pp. 165-172
Author(s):  
Dongge Deng ◽  
Mingzhi Zhu ◽  
Qiang Shu ◽  
Baoxu Wang ◽  
Fei Yang

It is necessary to develop a high homogeneous, low power consumption, high frequency and small-size shim coil for high precision and low-cost atomic spin gyroscope (ASG). To provide the shim coil, a multi-objective optimization design method is proposed. All structural parameters including the wire diameter are optimized. In addition to the homogeneity, the size of optimized coil, especially the axial position and winding number, is restricted to develop the small-size shim coil with low power consumption. The 0-1 linear programming is adopted in the optimal model to conveniently describe winding distributions. The branch and bound algorithm is used to solve this model. Theoretical optimization results show that the homogeneity of the optimized shim coil is several orders of magnitudes better than the same-size solenoid. A simulation experiment is also conducted. Experimental results show that optimization results are verified, and power consumption of the optimized coil is about half of the solenoid when providing the same uniform magnetic field. This indicates that the proposed optimal method is feasible to develop shim coil for ASG.


2016 ◽  
Vol 136 (11) ◽  
pp. 1555-1566 ◽  
Author(s):  
Jun Fujiwara ◽  
Hiroshi Harada ◽  
Takuya Kawata ◽  
Kentaro Sakamoto ◽  
Sota Tsuchiya ◽  
...  

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