Low Power Design for Wireless RF Transceiver–An Industrial View

In recent years, wireless communication in the radio frequency has a rapid growth, most noticeably the cellular phone. Analog FM systems, such as AMPS and TACS, have won a great success. In the 90s, digital systems appear, such as GSM in Europe, IS54/136 and IS95 in US, and PDC in Japan. Most recently, PCS draws the attention; there are many standards proposed around the world and they all use digital modulation schemes. With the ISM bands at 900 MHz and 2.4 MHz, many other innovative application will become possible. Unlike the computer such RF wireless gadgets contain one peculiar subsystem: the RF transceiver. The RF transceiver translates the baseband voice and data to and from a radio frequency signal which is emitted and received by antennae. Each system specifies the operation frequency, the transmit power, the receiver sensitivity, and the signal quality. The RF transceiver must satisfy all these requirements. As technology progresses, portable product becomes the dominant one which relies on the rechargeable battery. To maintain a decent talk time standby time, the completed product must be designed with low power consumption in mind. In the portable cellular phone the RF transceiver faces the greatest challenge in the low power design since it is the most power hungry portion: the transmitter consumes 90% power during transmission in the FM cellular phone nowadays. To achieve low power consumption of the RF transceiver, the designer has to work to: (1) transceiver architecture to reduce parts count and therefore power comsumption. (2) selection/design the lowest power comsumption IC/module for a given function block. (3) maintain competitive pricing and small size. In this article, FM system will be used as the baseline example to illustrate the importance of the RF transceiver in low power application. The RF transceiver architecture is described first, followed by the introduction to each function block. State-of-the-art products for each function block will be referred to. Theorectical limit of power consumption for each block will be discussed. Impact from digital modulation on RF circuit design will be reviewed as well.