Improved Conductance Method for Determining Interface Trap Density of Metal-Oxide-Semiconductor Device with High Series Resistance

2005 ◽  
Vol 44 (No. 48) ◽  
pp. L1460-L1462 ◽  
Author(s):  
Hyundoek Yang ◽  
Yunik Son ◽  
Sangmoo Choi ◽  
Hyunsang Hwang
Keyword(s):  
Metal Oxide ◽  
Semiconductor Device ◽  
Series Resistance ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Conductance Method ◽  
High Series

Electrical Characterization of GaN Metal Oxide Semiconductor Diodes Using MgO as the Gate Oxide

2001 ◽  
Vol 693 ◽  
Author(s):  
J. Kim ◽  
B. P. Gila ◽  
R. Mehandru ◽  
J.W. Johnson ◽  
J. H. Shin ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Electron Cyclotron Resonance ◽  
Gate Oxide ◽  
State Density ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Conductance Method

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing MgO as the gate oxide. MgO was grown at 100°C on MOCVD grown n-GaN in a molecular beam epitaxy system using a Mg elemental source and an electron cyclotron resonance oxygen plasma. H3PO4 based wet-chemical etchant was used to remove MgO to expose the underlying n-GaN for ohmic metal deposition. Electron deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallization, respectively. An interface trap density of low-to-mid 1011 eV-1cm-2was obtained from temperature conductance-voltage measurements. Terman method was also used to estimate the interface trap density and a slight lower number was obtained as compared to the conductance method. Results from elevated temperature (up to 300°C) conductance measurements showed an interface state density roughly three times higher(6x1011 eV–1 cm-2 ) than at 25°C.

scholarly journals Interface trap density and mobility extraction in InGaAs buried quantum well metal-oxide-semiconductor field-effect-transistors by gated Hall method

2014 ◽  
Vol 104 (13) ◽  
pp. 131605 ◽  
Author(s):  
Thenappan Chidambaram ◽  
Dmitry Veksler ◽  
Shailesh Madisetti ◽  
Andrew Greene ◽  
Michael Yakimov ◽  
...  
Keyword(s):  
Quantum Well ◽  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Hall Method

Electrical Characterization of GaN Metal Oxide Semiconductor Diode using Sc2O3 as the Gate Oxide

2001 ◽  
Vol 693 ◽  
Author(s):  
R. Mehandru ◽  
B.P. Gila ◽  
J. Kim ◽  
J.W. Johnson ◽  
K.P. Lee ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Inductively Coupled Plasma ◽  
Electron Cyclotron Resonance ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Semiconductor Diode ◽  
Interface Trap Density ◽  
Interface Trap

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing Sc2O3 as the gate oxide. Sc2O3 was grown at 100°C on MOCVD grown n-GaN layers in a molecular beam epitaxy (MBE) system, using a scandium elemental source and an Electron Cyclotron Resonance (ECR) oxygen plasma. Ar/Cl2 based discharges was used to remove Sc2O3, in order to expose the underlying n-GaN for ohmic metal deposition in an Inductively Coupled Plasma system. Electron beam deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallizations, respectively. An interface trap density of 5 × 1011 eV-1cm-2was obtained with the Terman method. Conductance-voltage measurements were also used to estimate the interface trap density and a slightly higher number was obtained as compared to the Terman method. Results of capacitance measurements at elevated temperature (up to 300°C) indicated the presence of deep states near the interface.

Effects of anneals in ammonia on the interface trap density near the band edges in 4H–silicon carbide metal-oxide-semiconductor capacitors

2000 ◽  
Vol 77 (22) ◽  
pp. 3601-3603 ◽  
Author(s):  
Gilyong Chung ◽  
Chin Che Tin ◽  
John R. Williams ◽  
K. McDonald ◽  
M. Di Ventra ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap

Stable Phosphorus Passivated SiO2/4H-SiC Interface Using Thin Oxides

2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  
Keyword(s):  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Polar Material ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Inversion Channel ◽  
Phosphosilicate Glass

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.

Sign in / Sign up

Export Citation Format

Share Document