Stable Phosphorus Passivated SiO2/4H-SiC Interface Using Thin Oxides

2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.

2012 ◽  
Vol 717-720 ◽  
pp. 743-746 ◽  
Author(s):  
Yogesh K. Sharma ◽  
Ayayi Claude Ahyi ◽  
Tamara Issacs-Smith ◽  
Xiao Shen ◽  
Sokrates T. Pantelides ◽  
...  

Phosphorous passivation of the SiO2/4H-SiC interface lowers the interface trap density and increases the field effect mobility for n-channel MOSFETs to twice the value of 30-40cm2/V-s obtained using standard NO nitridation. Passivation using P2O5 introduced with an SiP2O7 planar diffusion source (PDS) converts the oxide layer to phosphosilicate glass (PSG) which is a polar material. BTS (bias‐temperature‐stress) measurements with MOS capacitors and FETs show that the benefits of reduced interface trap density and increased mobility are offset by unstable flat band and threshold voltages. This instability can be removed by etching away the PSG oxide and depositing a replacement SiO2 layer. However, trap densities for etched MOS capacitors are "NO-like" (i.e., higher), which would lead one to expect a lower mobility if MOSFETs are fabricated with the PSG / etch / deposited oxide process.


2014 ◽  
Vol 104 (13) ◽  
pp. 131605 ◽  
Author(s):  
Thenappan Chidambaram ◽  
Dmitry Veksler ◽  
Shailesh Madisetti ◽  
Andrew Greene ◽  
Michael Yakimov ◽  
...  

2001 ◽  
Vol 693 ◽  
Author(s):  
R. Mehandru ◽  
B.P. Gila ◽  
J. Kim ◽  
J.W. Johnson ◽  
K.P. Lee ◽  
...  

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing Sc2O3 as the gate oxide. Sc2O3 was grown at 100°C on MOCVD grown n-GaN layers in a molecular beam epitaxy (MBE) system, using a scandium elemental source and an Electron Cyclotron Resonance (ECR) oxygen plasma. Ar/Cl2 based discharges was used to remove Sc2O3, in order to expose the underlying n-GaN for ohmic metal deposition in an Inductively Coupled Plasma system. Electron beam deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallizations, respectively. An interface trap density of 5 × 1011 eV-1cm-2was obtained with the Terman method. Conductance-voltage measurements were also used to estimate the interface trap density and a slightly higher number was obtained as compared to the Terman method. Results of capacitance measurements at elevated temperature (up to 300°C) indicated the presence of deep states near the interface.


2000 ◽  
Vol 77 (22) ◽  
pp. 3601-3603 ◽  
Author(s):  
Gilyong Chung ◽  
Chin Che Tin ◽  
John R. Williams ◽  
K. McDonald ◽  
M. Di Ventra ◽  
...  

2014 ◽  
Vol 806 ◽  
pp. 149-152
Author(s):  
Stephen M. Thomas ◽  
M.R. Jennings ◽  
Y.K. Sharma ◽  
C.A. Fisher ◽  
P.A. Mawby

Silicon carbide based devices have the potential to surpass silicon technology in high power, high frequency and high temperature applications. 4H-SiC MOS transistors currently suffer from a low channel mobility due to a high density of traps near the oxide/SiC interface. In this work, oxides have been grown on the Si face of 4H-SiC using oxygen flow rates ranging from 2.5 l/min to 0.05 l/min. Capacitance-voltage measurements on MOS capacitors revealed approximately a fourfold reduction in the interface trap density and a 25% increase in oxide thickness by reducing the flow rate from 2.5 l/min to 0.05 l/min.


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