Effective Improvement on Barrier Capability of Chemical Vapor Deposited WSi x Using  N 2 Plasma Treatment

1999 ◽  
Vol 146 (4) ◽  
pp. 1583-1592 ◽  
Author(s):  
M. T. Wang ◽  
Y. C. Lin ◽  
J. Y. Lee ◽  
C. C. Wang ◽  
M. C. Chen
Keyword(s):  
Plasma Treatment ◽  
Chemical Vapor ◽  
Chemical Vapor Deposited

Characteristics of Large-Area Plasma Enhanced Chemical Vapor Deposited TEOS Oxide with Various Short-Time Plasma Treatments

2001 ◽  
Vol 685 ◽  
Author(s):  
Ting-Kuo Chang ◽  
Ching-Wei Lin ◽  
Chang-Ho Tseng ◽  
Huang-Chung Cheng ◽  
Yuan-Ching Peng ◽  
...  
Keyword(s):  
Plasma Treatment ◽  
Chemical Vapor ◽  
Electrical Strength ◽  
Large Area ◽  
Plasma Treatments ◽  
Chemical Vapor Deposited ◽  
Bias Temperature Stress ◽  
Short Time ◽  
Harmful Effects

AbstractIn this work, high quality silicon dioxide (SiO2) films were prepared by large-area plasmaenhanced chemical vapor deposition (LA-PECVD) using tetraethylorthosilicate(TEOS)-oxygen based chemistry. The effects of various short-time plasma treatments on these as-deposited TEOS oxide were also investigated. Different plasma treatments such as O2, N2O, and NH3 were used in our experiments. Electrical characteristics were exploited to examine the effects of plasma treatments. It was shown that after N2O, and NH3 plasma treatments, the electrical strength of oxide was enhanced. Besides, NH3 plasma treatment exhibited the highest enhancement efficiency. O2- plasma treatment, however, showed some harmful effects on the electrical properties of the TEOS oxide. The reliability tests including charge to breakdown (Qbd) and bias temperature stress (BTS) were also analyzed in these samples. Although better pre-stress characteristics were observed in those samples treated by NH3-plasma, samples with N2O plasma treatment showed superior stress endurance. Consequently, N2O plasma treatment seems to be the best candidate for future TFTs under the consideration of long-term reliability.

Influence of N2/H2 plasma treatment on chemical vapor deposited TiN multilayer structures for advanced CMOS technologies

2003 ◽  
Vol 102 (1-3) ◽  
pp. 358-361 ◽  
Author(s):  
V. Melnik ◽  
D. Wolanski ◽  
E. Bugiel ◽  
A. Goryachko ◽  
S. Chernjavski ◽  
...  
Keyword(s):  
Plasma Treatment ◽  
Chemical Vapor ◽  
Multilayer Structures ◽  
Chemical Vapor Deposited

Ion Beam Induced Interfacial Reactions in Molybdenum Thin Films on Silicon

1981 ◽  
Vol 39 ◽  
pp. 162-163
Author(s):  
L. J. Chen ◽  
L. S. Hung ◽  
J. W. Mayer
Keyword(s):  
Ion Beam ◽  
Chemical Vapor ◽  
Interfacial Reactions ◽  
Practical Applications ◽  
Microelectronic Devices ◽  
Recent Emergence ◽  
Chemical Vapor Deposited ◽  
Atomic Mixing ◽  
Silicon Interface ◽  
Kinetics Of

When an energetic ion penetrates through an interface between a thin film (of species A) and a substrate (of species B), ion induced atomic mixing may result in an intermixed region (which contains A and B) near the interface. Most ion beam mixing experiments have been directed toward metal-silicon systems, silicide phases are generally obtained, and they are the same as those formed by thermal treatment.Recent emergence of silicide compound as contact material in silicon microelectronic devices is mainly due to the superiority of the silicide-silicon interface in terms of uniformity and thermal stability. It is of great interest to understand the kinetics of the interfacial reactions to provide insights into the nature of ion beam-solid interactions as well as to explore its practical applications in device technology.About 500 Å thick molybdenum was chemical vapor deposited in hydrogen ambient on (001) n-type silicon wafer with substrate temperature maintained at 650-700°C. Samples were supplied by D. M. Brown of General Electric Research & Development Laboratory, Schenectady, NY.

Metal Microstructures in Advanced CMOS Devices

1996 ◽  
Vol 54 ◽  
pp. 358-359
Author(s):  
L. M. Gignac ◽  
K. P. Rodbell
Keyword(s):  
Grain Boundaries ◽  
Semiconductor Device ◽  
Chemical Vapor ◽  
Microstructural Characterization ◽  
Metal Films ◽  
Thin Metal ◽  
Electrical Performance ◽  
Thin Metal Films ◽  
Chemical Vapor Deposited ◽  
Boundary Properties

As advanced semiconductor device features shrink, grain boundaries and interfaces become increasingly more important to the properties of thin metal films. With film thicknesses decreasing to the range of 10 nm and the corresponding features also decreasing to sub-micrometer sizes, interface and grain boundary properties become dominant. In this regime the details of the surfaces and grain boundaries dictate the interactions between film layers and the subsequent electrical properties. Therefore it is necessary to accurately characterize these materials on the proper length scale in order to first understand and then to improve the device effectiveness. In this talk we will examine the importance of microstructural characterization of thin metal films used in semiconductor devices and show how microstructure can influence the electrical performance. Specifically, we will review Co and Ti silicides for silicon contact and gate conductor applications, Ti/TiN liner films used for adhesion and diffusion barriers in chemical vapor deposited (CVD) tungsten vertical wiring (vias) and Ti/AlCu/Ti-TiN films used as planar interconnect metal lines.

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