CMOS Scaling with III-V Channels for Improved Performance and Low Power

2011 ◽  
Keyword(s):  
Low Power ◽  
Cmos Scaling ◽  
Improved Performance

CMOS Scaling with III-V Channels for Improved Performance and Low Power

2019 ◽  
Vol 35 (3) ◽  
pp. 335-344 ◽  
Author(s):  
Richard J. Hill ◽  
Jungwoo Oh ◽  
Chanro Park ◽  
J. Barnett ◽  
Jimmy Price ◽  
...  
Keyword(s):  
Low Power ◽  
Cmos Scaling ◽  
Improved Performance

scholarly journals Analog to Digital Converters (ADC): A Literature Review

2020 ◽  
Vol 184 ◽  
pp. 01025
Author(s):  
Hemlata Dalmia ◽  
Sanjeet K. Sinha
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
Communication Technology ◽  
High Performance ◽  
Reducing Power ◽  
Digital Signal ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Cmos Scaling ◽  
Analog To Digital Conversion

The signal processing is advancing day by day as its needs and in wireline/wireless communication technology from 2G to 4G cellular communication technology with CMOS scaling process. In this context the high-performance ADCs, analog to digital converters have snatched the attention in the field of digital signal processing. The primary emphasis is on low power approaches to circuits, algorithms and architectures that apply to wireless systems. Different techniques are used for reducing power consumption by using low power supply, reduced threshold voltage, scaling of transistors, etc. In this paper, we have discussed the different types and different techniques used for analog to digital conversion of signals considering several parameters.

scholarly journals Qunatum-Dot Cellular Automata Technology based Optimized Multiplexers Design

2019 ◽  
Vol 8 (2S11) ◽  
pp. 2717-2725
Keyword(s):  
Cellular Automata ◽  
Cell Count ◽  
Software Tool ◽  
Cmos Technology ◽  
Digital Circuit ◽  
Cmos Scaling ◽  
Memory Circuits ◽  
Physical Limitations ◽  
Improved Performance ◽  
The Cost

Multiplexer plays a dynamic role in the optimization of a digital circuit (FPGA, ALU and memory circuits etc) implementations. Due to continuous Scaling of CMOS device, has already reached to the minimum transistor size, hence , it is not possible to reduce the transistor dimensions further without scaling issues and functionality affect. QCA is one of the emerging and promising new nanotechnologies and is suitable to replace conventional CMOS technology, and potentially able to solve the physical limitations and challenges of CMOS scaling issues. In this paper, the proposed 2:1 multiplexer structure makes the use of inherent characteristics of QCA cells to act as an efficient multiplexer. The proposed QCA based multiplexer architecture improves 50% of design area, 29% of cell count and 75% of the cost when compared with the earlier designed best multiplexer architectures. Higher order multiplexers 4:1 and 8:1 are also designed using proposed 2:1 multiplexer which improved performance to a greater extent relative to existing efficient multiplexer architectures. The design and simulation of circuits have been performed using software tool QCA Designer Version 2.0.3.

scholarly journals Compact and Low-Power Diode Laser Hygrometer for Weather Balloons

2005 ◽  
Vol 22 (8) ◽  
pp. 1219-1224 ◽  
Author(s):  
M. E. Paige
Keyword(s):  
Low Power ◽  
High Altitude ◽  
Diode Laser ◽  
Frequent Use ◽  
Cavity Laser ◽  
Improved Performance ◽  
Near Future ◽  
Vertical Cavity ◽  
Power Diode ◽  
Measurement Period

Abstract A vertical cavity laser hygrometer has been developed for balloon-borne measurements. This hygrometer meets many of the specifications that are required for common weather balloon instrumentation, including weight, size, time response, and sensitivity. In addition, the system cost has been dramatically lowered relative to prior diode laser instruments. Sensitivity of 2 and 0.9 μbar at low- and high-altitude conditions, respectively, has been obtained in a 1-s measurement period, with the strong possibility of improved performance in the near future. The engineering advances that are demonstrated by this system make balloon-borne diode laser hygrometry a practical technique for more frequent use.

Improved performance of a junctionless tunnel field effect transistor with a Si and SiGe heterostructure for ultra low power applications

RSC Advances ◽  
2015 ◽  
Vol 5 (60) ◽  
pp. 48779-48785 ◽  
Author(s):  
Pranav Kumar Asthana ◽  
Yogesh Goswami ◽  
Shibir Basak ◽  
Shiromani Balmukund Rahi ◽  
Bahniman Ghosh
Keyword(s):  
Low Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Ultra Low Power ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Improved Performance

In this paper, we present improved device characteristics of a Junctionless Tunnel Field Effect Transistor (JLTFET) with a Si and SiGe heterostructure.

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