scholarly journals 14-bit ADC as voltage monitoring device for power supply module 6 using I2C interface

2021 ◽  
Vol 23 (2) ◽  
pp. 709
Author(s):  
Edison R. Castillo ◽  
Catherine D. Samson ◽  
Glenn N. Ortiz ◽  
Mark Joseph B. Enojas
Keyword(s):  
Fault Detection ◽  
Power Supply ◽  
Integrated Circuit ◽  
Monitoring Device ◽  
Digital Converter ◽  
Analog To Digital ◽  
Calibration Process ◽  
Current Testing ◽  
Nominal Voltage ◽  
Current Setting

<p>Thereare recorded downtime in the current testing processes of microelectronic packages. The available test equipment, the isolation of the power supply modules and the processes of testing must be changed in order to minimize the downtime. This study presents the design and development of a voltage monitoring device made of a 14-bit analog to digital converter (ADC) interfaced through inter-integrated circuit (I2C) for power supply module 6 (PS6). It is built to address the downtime in isolation and testing process of PS6. This setup is able to monitor and display three output voltages operating in 4-12V signals through athin film transistor (TFT) monitor. Tests were conducted for the nominal voltage and current setting scalled the three-point tests. In result, the fault detection and calibration process of PS6 are able to minimize downtimes. The developed voltage monitoring device has an acceptable percentage of 0.04572% which also canbe a replacement for digital multimeters (DMMs) for specific applications to PS6.</p>

scholarly journals ANALYSIS AND DESIGN OF A NEW STRUCTURE FOR 10-BIT 350MS/S PIPELINE ANALOG TO DIGITAL CONVERTER

2019 ◽  
Vol 8 (3) ◽  
Author(s):  
Arash Rezapour ◽  
Mohammad Bagher Tavakoli ◽  
Farbod Setoudeh
Keyword(s):  
Power Supply ◽  
Data Transfer ◽  
Open Loop ◽  
Total Power ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Analog To Digital ◽  
Analysis And Design ◽  
Second Stage ◽  
Total Power Consumption

A 10-bit pipelined Analog to Digital converter is proposed in this paper with using 0.18 µm TSMC technology. In this paper, a new structure is proposed to increase the speed of the pipeline analog to digital convertor. So at the first stage is not used the amplifier and instead the buffer is used for data transfer to the second stage. The speed of this converter is 350MS/s. An amplifier circuit with accurate gain of 6 and a very accurate unit gain buffer circuit that are open loop with a new structure were. used. In this Converter, the first 3 bits are extracted simultaneously with sampling. The proposed analog-to-digital converter was designed with the total power consumption 75mW using power supply of 1.8v.

scholarly journals A 10-bit 150MS/s Pipelined ADC with 2.5bit Gain Stage for High Frequency Applications

2019 ◽  
Vol 8 (10) ◽  
pp. 883-886
Keyword(s):  
Power Supply ◽  
High Frequency ◽  
Sampling Rate ◽  
High Accuracy ◽  
Pipelined Adc ◽  
Effective Number ◽  
Digital Converter ◽  
Analog To Digital ◽  
Computational Burden ◽  
Gain Stage

This paper proposes a 10-bit pipelined Analog to Digital Converter (ADC) which incorporates various techniques for lesser power and higher performance. The proposed method reduces the computational burden while comparing to the modified Monte-Carlo (MC) method. Pipelined ADC has N number of stages, it has higher resolution and higher frequency of conversion while comparing to other ADCs. The proposed ADC employs five 2.5bit gain stages; instead of 1.5bit gain stages for high accuracy. This method is implemented in the Tanner Software with the Generic 250nm library at a maximum power supply of 5V. The maximum frequency attained is 150MHz; and the ADC exhibits a SNR of 61.96dB. It also attains a 10bits as effective number of bits at the maximum sampling rate.

scholarly journals Development of a functional model of the temperature meter

2021 ◽  
pp. 53-59
Author(s):  
Natalia Zaschepkina ◽  
Maxim Svyta
Keyword(s):  
Power Supply ◽  
Temperature Sensor ◽  
Supply Voltage ◽  
Functional Model ◽  
Measurement Range ◽  
Platinum Resistance ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Analog To Digital ◽  
Operating Range

Thin-film platinum resistance thermometers of various designs and performance are widely used in various industries. The temperature measurement range of these sensors is from -200 °C to +600 °C. A functional model of a portable digital temperature meter in the range from -50 °C to +300 ℃ based on the L416 sensor type Pt100 is proposed. The optimal circuit solution for connecting the L416 sensor to the Winston measuring bridge was selected. The proposed circuit solution is suitable for power supply from autonomous DC sources, which allows for miniaturization of the device and contributes to energy efficiency. The amplification of the output voltage of the amplifier in the entire operating range of the analog-to-digital converter following the operating range of the temperature sensor has been performed, which allows obtaining the maximum resolution of the analog-to-digital conversion when measuring temperature. A functional model for converting the resistance of a temperature sensor into a digital code has been developed. The functional model shows that the source code of the analog-to-digital converter does not depend on the supply voltage of the circuit, thus realizing the stability of the function of converting the resistance of the sensor into the value of the code of the analog-to-digital converter. The sensor has a normalized characteristic of the dependence of resistance on temperature, so a precision resistance box MSR-60M has been used to calibrate the circuit of the temperature meter. With the help of the resistance box MSR-60M, it is possible to calibrate the circuit of the temperature meter with an uncertainty of 0.07 °C. Keywords: temperature meter; RTD; Pt100; Winston bridge; ratiometric power supply.

A 0.975 μW 10-bit 100 kS/s SAR ADC with an energy-efficient and area-efficient switching scheme

2017 ◽  
Vol 31 (19-21) ◽  
pp. 1740051 ◽  
Author(s):  
Yunfeng Hu ◽  
Chao Xiong ◽  
Bin Li
Keyword(s):  
Power Supply ◽  
Energy Efficient ◽  
Figure Of Merit ◽  
Sampling Rate ◽  
Cmos Technology ◽  
Digital Converter ◽  
Switching Scheme ◽  
Analog To Digital ◽  
Area Reduction ◽  
Area Efficient

A 10-bit successive approximation register (SAR) analog-to-digital converter (ADC) with an energy-efficient and area-efficient switching scheme was presented. By using C-2C dummy capacitor and an extra reference [Formula: see text] for the last capacitor, the proposed switching scheme achieves 97.65% switching energy saving, 87.2% capacitor area reduction and 47.06% switches reduction, compare to conventional switching scheme. The ADC was implemented in a 180 nm CMOS technology 1.8 V power supply, at sampling rate of 100 kS/s, the ADC achieves an SNDR of 57.84 dB and consumes 0.975 [Formula: see text], resulting in a figure-of-merit (FOM) of 15.3 fJ/conversion-step.

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