Dual-Gate FETs

Author(s):  
Seiichi Watanabe
Keyword(s):  
1993 ◽  
Vol 3 (9) ◽  
pp. 1719-1728
Author(s):  
P. Dollfus ◽  
P. Hesto ◽  
S. Galdin ◽  
C. Brisset

Author(s):  
Cheng-Piao Lin ◽  
Chin-Hsin Tang ◽  
Cheng-Hsu Wu ◽  
Cheng-Chun Ting

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.


1971 ◽  
Vol 7 (22) ◽  
pp. 661 ◽  
Author(s):  
J.A. Turner ◽  
A.J. Waller ◽  
E. Kelly ◽  
D. Parker

2005 ◽  
Author(s):  
D.C.H. Yu ◽  
K.H. Lee ◽  
A. Kornblit ◽  
C.C. Fu ◽  
R.H. Yan ◽  
...  
Keyword(s):  

Author(s):  
Chunsheng Chen ◽  
Yongli He ◽  
Li Zhu ◽  
Ying Zhu ◽  
Yi Shi ◽  
...  

Author(s):  
Dennis Lin ◽  
Xiangyu Wu ◽  
Daire Cott ◽  
Devin Verreck ◽  
Benjamin Groven ◽  
...  
Keyword(s):  

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 63
Author(s):  
Saima Hasan ◽  
Abbas Z. Kouzani ◽  
M A Parvez Mahmud

This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.


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