FPGA Implementation of UART with Single Error Correction and Double Error Detection (UART-SEC-DED)

The Universal Asynchronous Receiver Transmitter (UART) is the very simple and significant sequential communication protocol which is basically utilized for microprocessors & microcontroller systems. It is a shorter range communication protocol, which able to perform half-duplex and full-duplex type of communication at baud rates. Though, UART is a type of shorter range communication still they are not resistant to noisy channel which leads to communication errors by flipping or loosing of bits. These kinds of signal errors are named as forward-errors. The correction of forward errors is a mechanism to handle and rectify those errors (i.e. Burst errors and Random bits error). Thus in this methodology, have introduced a UART-SEC-DED communication module design which utilizes the Hamming encoder and decoders to achieve the forward error correction. Finally, the proposed system will simulated and implemented on FPGA board and experimental outcomes shows the better efficiency in single error correction and detection of double errors.

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FPGA-Implemented Fractal Decoder with Forward Error Correction in Short-Reach Optical Interconnects

Entropy ◽

10.3390/e24010122 ◽

2022 ◽

Vol 24 (1) ◽

pp. 122

Author(s):

Svitlana Matsenko ◽

Oleksiy Borysenko ◽

Sandis Spolitis ◽

Aleksejs Udalcovs ◽

Lilita Gegere ◽

...

Keyword(s):

Error Correction ◽

Error Detection ◽

Optical Interconnects ◽

Error Control ◽

Forward Error Correction ◽

Golden Ratio ◽

Probability Method ◽

Additional Error ◽

Hardware Costs ◽

Forward Error

Forward error correction (FEC) codes combined with high-order modulator formats, i.e., coded modulation (CM), are essential in optical communication networks to achieve highly efficient and reliable communication. The task of providing additional error control in the design of CM systems with high-performance requirements remains urgent. As an additional control of CM systems, we propose to use indivisible error detection codes based on a positional number system. In this work, we evaluated the indivisible code using the average probability method (APM) for the binary symmetric channel (BSC), which has the simplicity, versatility and reliability of the estimate, which is close to reality. The APM allows for evaluation and compares indivisible codes according to parameters of correct transmission, and detectable and undetectable errors. Indivisible codes allow for the end-to-end (E2E) control of the transmission and processing of information in digital systems and design devices with a regular structure and high speed. This study researched a fractal decoder device for additional error control, implemented in field-programmable gate array (FPGA) software with FEC for short-reach optical interconnects with multilevel pulse amplitude (PAM-M) modulated with Gray code mapping. Indivisible codes with natural redundancy require far fewer hardware costs to develop and implement encoding and decoding devices with a sufficiently high error detection efficiency. We achieved a reduction in hardware costs for a fractal decoder by using the fractal property of the indivisible code from 10% to 30% for different n while receiving the reciprocal of the golden ratio.

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ANALISIS KEADILAN MODEL PENJADWALAN YANG DIINTEGRASIKAN DENGAN HARQ PADA SISTEM LTE

TEKTRIKA - Jurnal Penelitian dan Pengembangan Telekomunikasi Kendali Komputer Elektrik dan Elektronika ◽

10.25124/tektrika.v1i1.241 ◽

2016 ◽

Vol 1 (1) ◽

Author(s):

Danu Dwi Sanjoyo ◽

Rendy Munadi ◽

Ida Wahidah

Keyword(s):

Error Correction ◽

Error Detection ◽

Forward Error Correction ◽

Proportional Fairness ◽

Quality Information ◽

Channel Quality ◽

Term Evolution ◽

Forward Error ◽

Channel Quality Information

Penjadwalan pada Long Term Evolution (LTE) memiliki peran dalam melayani kebutuhan bandwidth yang besar. Oleh karena itu, jaringan seluler LTE membutuhkan algoritma penjadwalan yang mampu mengakomodasi informasi keluaran dari proses HARQ untuk meningkatkan fairness. Algoritma penjadwalan dikombinasikan dengan proses HARQ untuk meningkatkan keadilan throughput yang diterima oleh pengguna. Redundancy Version (RV) yang diperoleh dari proses HARQ dikombinasikan dengan nilai prioritas layanan dan Channel Quality Information (CQI) menjadi suatu nilai metrik yang digunakan untuk menentukan prioritas paket pada proses penjadwalan. Algoritma penjadwalan diujikan pada makalah ini adalah Round Robin (RR), Maximum C/I (CI), dan Proportional Fairness (PF). Proses HARQ di penerima melakukan Error Detection (ED) dan Forward Error Correction (FEC) pada paket yang diterima. User Equipment (UE) akan mengirimkan feedback ke eNode-B yang berisi informasi apakah paket berhasil diterima dengan benar atau tidak. Integrasi masing-masing algoritma penjadwalan (RR, CI, dan PF) dengan nilai CQI, rangking paket data, dan RV dapat meningkatkan nilai fairness antarpengguna. Jain�s Fairnees Index, sebagai parameter keadilan, menunjukkan adanya peningkatan keadilan throughput.Kata kunci: LTE, penjadwalan, HARQ, Jain�s Fairness Index

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Designing VHDL to Simulate the Error Correction of Hamming Code

JOURNAL OF SCIENCE AND APPLIED ENGINEERING ◽

10.31328/jsae.v1i2.888 ◽

2018 ◽

Vol 1 (2) ◽

Author(s):

A. Mahmudi ◽

S. Achmadi

Keyword(s):

Error Correction ◽

Error Detection ◽

Forward Error Correction ◽

Data Communication ◽

Hamming Code ◽

Data Errors ◽

Quasi Experimental ◽

Forward Error ◽

Correct Data

The role of error detection and error correction for the data bit by the receiver is very important because the sender does not need to repeat the transmissions. Thus, the speed and reliability in transmitting data information can be maintained. This study aims to implement simulation the Forward Error Correction (FEC) method in verifying and correcting data errors received by using simulation. To support FEC method, study utilizes visual basic software so that it can be used as one of the quasi-experimental modules in the data communication laboratory. The Forward Error Correction (FEC) method is a method that can correct data errors in the receiver. This method uses simulated Hamming codes on the computer so that the detection and correction process can be clearly demonstrated on the monitor screen. This simulation can be used as a quasi-experimental module in a data communication laboratory. The simulation results show that the Hamming code (17, 12) codec has been running as expected.

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