Evaluation of Sub-Gap States in Amorphous In-Ga-Zn-O Thin Films Treated with Various Process Conditions

2014 ◽  
Vol 1633 ◽  
pp. 55-60 ◽  
Author(s):  
Kazushi Hayashi ◽  
Aya Hino ◽  
Hiroaki Tao ◽  
Yasuyuki Takanashi ◽  
Shinya Morita ◽  
...  
Keyword(s):  
Thin Films ◽  
Peak Position ◽  
Process Conditions ◽  
Charge Densities ◽  
Capacitance Voltage ◽  
Time Regime ◽  
Order Of Magnitude ◽  
Transient Spectroscopy ◽  
Gap States ◽  
Capacitance Transient

ABSTRACTIn the present study, the sub-gap states of amorphous In-Ga-Zn-O (a-IGZO) thin films treated with various process conditions have been evaluated by means of capacitance-voltage (C-V) characteristics and isothermal capacitance transient spectroscopy (ICTS). It was found that the space-charge densities of the a-IGZO decreased as the oxygen partial pressure was increased during the sputtering of a-IGZO thin films. The ICTS spectra for the 4, 8, and 12 % samples were similar and the peak positions were found to be around 1 × 10-2 s at 180 K. On the other hand, the peak position for the 20 % sample shifted to a longer time regime and was located at around 2 × 10-1 s at 180 K. The total densities of the traps for the 4, 8, and 12 % samples were calculated to be 5−6 × 1016 cm-3, while that for 20 % was one order of magnitude lower than the others. From Thermal desorption spectrometer, it was found that desorption of Zn atoms started at a temperature higher than 300 °C for the 4 % sample, while desorption of Zn was not observed for the 20 % sample. The introduction of the sub-gap states could be attributed to oxygen-rich and/or Zn-deficient defects in the a-IGZO thin films formed during thermal annealing.

Nanoscale Analysis of Defects in Semiconductors and Dielectrics by Means of Charge-transient Spectroscopy/microscopy

2007 ◽  
Vol 1025 ◽  
Author(s):  
Štefan Lányi ◽  
Vojtech Nádaždy ◽  
Miloslav Hruškovic ◽  
Ján Hribik
Keyword(s):  
Thin Films ◽  
Optimal Shape ◽  
Defect Concentration ◽  
Transient Current ◽  
Order Of Magnitude ◽  
Transient Spectroscopy ◽  
Capacitance Transient ◽  
Micrometer Scale ◽  
Defects In Semiconductors ◽  
Isothermal Capacitance Transient Spectroscopy

AbstractWe discuss the possibilities of analysis of electrically active defects in semiconductors and dielectrics by means of Isothermal Capacitance-Transient Spectroscopy and Isothermal Charge-Transient Spectroscopy, applied on sub-micrometer scale. While the first of them utilizes the relaxation of the depletion layer, caused by emission of trapped charges and requires sufficient conductivity, the second directly integrates the transient current and can be applied also to low-conductivity materials like dielectrics.We present some results obtained on pentacene thin films. By means of our charge-transient spectrometer we have achieved a resolution of hundreds of electrons but we believe it can be further improved approximately by one order of magnitude. In materials with relatively high defect concentration, using optimal shape of the probe, a resolution on the order of tens of manometers can be achieved. At low defect concentrations, e.g. in device quality silicon, a resolution on the hundred-nm level is expected.

Relationship between Constant Voltage and Constant Capacitance DLTS

1983 ◽  
Vol 20 (2) ◽  
pp. 145-149
Author(s):  
W. S. Lau ◽  
Y. W. Lam ◽  
C. C. Chang
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Constant Voltage ◽  
Unified Approach ◽  
Deep Traps ◽  
Capacitance Voltage ◽  
Voltage Transient ◽  
Transient Spectroscopy ◽  
Capacitance Transient ◽  
The Relationship

A unified approach is presented in the derivation of equations for the constant-voltage capacitance transient and constant-capacitance voltage transient in deep-level transient spectroscopy (DLTS), and for the relationship between them. The validity of these equations is independent of the device and nature of deep traps.

Characterization of CdS–CuInSe2 solar cells by current–voltage, capacitance–voltage, and capacitance-transient measurements

1987 ◽  
Vol 65 (8) ◽  
pp. 966-971 ◽  
Author(s):  
N. Christoforou ◽  
J. D. Leslie ◽  
S. Damaskinos
Keyword(s):  
Solar Cells ◽  
Deep Level ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Carrier Trap ◽  
Transient Spectroscopy ◽  
Increasing Temperature ◽  
P Type ◽  
Capacitance Transient ◽  
Transient Measurements

CdS–CuInSe2 solar cells, which have an efficiency of 9%, have been studied by current–voltage, capacitance–voltage, and capacitance-transient measurements over the temperature range 90–380 K. Deep-level transient spectroscopy analysis of the capacitance transient measurements reveals one majority carrier trap with an activation energy of 0.70 ± 0.02 eV. Although the present experiment cannot establish definitely if the trap is in the CdS or CuInSe2 layer, arguments are presented that it is a hole trap in the p-type CuInSe2 layer. Current–voltage measurements indicate a reversible increase in the reverse-bias leakage current with increasing temperature above 300 K. Evidence is presented that suggests that the rectifying barrier height in the CdS–CuInSe2 solar cell decreases rapidly with temperature above 300 K. Capacitance versus voltage measurements suggest that the depiction layer being studied is primarily in the CuInSe2, but the temperature dependence of the ionized charge concentration N(x) cannot be totally explained although one possible cause is suggested.

Interface states of laser ablated BaTiO3 and Ba0.9Ca0.1TiO3 thin films in MFS structure determined by DLTS and C – V technique

2003 ◽  
Vol 784 ◽  
Author(s):  
P. Victor ◽  
S. Saha ◽  
S. B. Krupanidhi
Keyword(s):  
Thin Films ◽  
Deep Level ◽  
Low Frequency ◽  
Interface States ◽  
Excimer Laser Ablation ◽  
Inversion Region ◽  
Capacitance Voltage ◽  
Transient Spectroscopy ◽  
P Type ◽  
Minority Carriers

ABSTRACTBaTiO3 and Ba0.9Ca0.1TiO3 thin films were deposited on the p – type Si substrate by pulsed excimer laser ablation technique. The Capacitance – Voltage (C-V) measurement measured at 1 MHz exhibited a clockwise rotating hysteresis loop with a wide memory window for the Metal – Ferroelectric – Semiconductor (MFS) capacitor confirming the ferroelectric nature. The low frequency C – V measurements exhibited the response of the minority carriers in the inversion region while at 1 MHz the C – V is of a high frequency type with minimum capacitance in the inversion region. The interface states of both the MFS structures were calculated from the Castagne – Vaipaille method (High – low frequency C – V curve). Deep Level Transient Spectroscopy (DLTS) was used to analyze the interface traps and capture cross section present in the MFS capacitor. There were distinct peaks present in the DLTS spectrum and these peaks were attributed to the presence of the discrete interface states present at the semiconductor – ferroelectric interface. The distribution of calculated interface states were mapped with the silicon energy band gap for both the undoped and Ca doped BaTiO3 thin films using both the C – V and DLTS method. The interface states of the Ca doped BaTiO3 thin films were found to be higher than the pure BaTiO3 thin films.

Effects of N Incorporation on Electron Traps at SiO2/SiC Interfaces

2012 ◽  
Vol 717-720 ◽  
pp. 717-720
Author(s):  
Alberto F. Basile ◽  
Sarit Dhar ◽  
John R. Williams ◽  
Leonard C. Feldman ◽  
Patricia M. Mooney
Keyword(s):  
Transport Properties ◽  
Mos Transistors ◽  
Temperature Dependent ◽  
Channel Mobility ◽  
Interface Defects ◽  
Capacitance Voltage ◽  
Transient Spectroscopy ◽  
N Incorporation ◽  
Capacitance Transient

Temperature dependent capacitance-voltage (C-V) and constant capacitance transient spectroscopy (CCDLTS) measurements have been performed to investigate the role of N in improving the transport properties of 4H-SiC MOS transistors. The higher channel mobility in the N pre-implanted transistors is due at least in part to activation of a small fraction of the implanted N near the SiO2/SiC interface as donors in SiC during oxidation, thus reducing the effects of interface trapping. In addition, the absence of oxidation-induced near-interface defects, which were observed in NO-annealed capacitors, may contribute to the improved mobility in N pre-implanted transistors.

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