scholarly journals Quantum Simulation of C-V and I-V Characteristics in Ge and III-V Materials/High-κ MOS Devices

2009 ◽  
Vol 1194 ◽  
Author(s):  
Mathieu Moreau ◽  
Daniela Munteanu ◽  
Jean-Luc Autran ◽  
Florence Bellenger ◽  
Jérome Mitard ◽  
...  

AbstractWe present a one-dimensional simulation study of the capacitance-voltage (C-V) and current-voltage (I-V) characteristics in MOS devices with high mobility semiconductors (Ge and III-V materials) and non-conventional gate stack with high-κ dielectrics. The C-V quantum simulation code self-consistently solves the Schrödinger and Poisson equations and the electron transport through the gate stack is computed using the non-equilibrium Green’s function formalism (NEGF). Simulated C-V characteristics are successfully confronted to experimental data for various MOS structures with different semiconductors and dielectric stacks. Simulation of I-V characteristics reveals that gate leakage current strongly depends on gate stacks and substrate materials and predicts low leakage current for future CMOS devices with high mobility materials and high-κ dielectrics.

2003 ◽  
Vol 39 (8) ◽  
pp. 692 ◽  
Author(s):  
C.W. Yang ◽  
Y.K. Fang ◽  
S.F. Chen ◽  
M.F. Wang ◽  
T.H. Hou ◽  
...  

2018 ◽  
Author(s):  
R. IlPyo ◽  
Kim SangHyeon ◽  
H. JaeHoon ◽  
G. Dae-Myeong ◽  
K.Seong Kwang ◽  
...  

2006 ◽  
Vol 53 (4) ◽  
pp. 923-925 ◽  
Author(s):  
M. Yamaguchi ◽  
T. Sakoda ◽  
H. Minakata ◽  
Shiqin Xiao ◽  
Y. Morisaki ◽  
...  

2021 ◽  
Vol 285 ◽  
pp. 129120
Author(s):  
Wenxin Liang ◽  
Hongfeng Zhao ◽  
Xiaoji Meng ◽  
Shaohua Fan ◽  
Qingyun Xie

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.


2018 ◽  
Vol 65 (2) ◽  
pp. 680-686 ◽  
Author(s):  
Cheng-Jung Lee ◽  
Ke-Jing Lee ◽  
Yu-Chi Chang ◽  
Li-Wen Wang ◽  
Der-Wei Chou ◽  
...  

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