A Self-Aligned Silicide Technology using Ion-Beam Mixing, Doped Silicide, and Rapid Thermal Processing

1989 ◽  
Vol 146 ◽  
Author(s):  
Y. H. Ku ◽  
S. K. Lee ◽  
D. L. Kwong ◽  
P. Chu

ABSTRACTA SALICIDE process is described in this paper, in which ion-beam mixing is used for silicide formation, and doped silicide in conjunction with RTA drive-in are used for shallow silicided junction formation. Fundamental issues related to this process have been investigated, including (i) effects of ion-beam mixing and RTA on the properties of Ti SALICIDE and the interaction between Ti and SiO2; (ii) the self-aligned TiNxOy TiSi2 contact barrier formation and phase transformation; (iii) the mechanism of impurity rediWstrbution and segregation, and junction formation during RTA drive-in; and (iv) the performances and reliability of fabricated SALICIDE devices. Results show that this process may have a great impact on future VLSI technology.

1985 ◽  
Vol 45 ◽  
Author(s):  
K. Maex ◽  
R.F. de Keersmaecker ◽  
P.F.A. Alkemade

ABSTRACTThe use of rapid thermal processing is reported for simultaneous formation of TiSi2 from Ti deposited layers and activation of As or Sb implanted profiles in Si. Properties of the silicide and the doped Si are reported with emphasis on impurity redistribution and defect removal.


1987 ◽  
Vol 92 ◽  
Author(s):  
Y. H. Ku ◽  
S. K. Lee ◽  
E. Louis ◽  
D. K. Shih ◽  
D. L. Kwong

ABSTRACTA self-aligned titanium silicide process which combines the use of ion-beam mixing and rapid thermal processing (RTP) has been developed for CMOS VLSI applications. Shallow silicided junctions are formed by implanting dopants into silicide layers previously formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of the implanted ions into the Si substrate during high temperature RTP. In addition, the formation of TiN on TiSi2 is achieved simultaneously during this process as a diffusion barrier for Al metallization. Short-channel MOS transistors with SALICIDE structure have been successfully fabricated and tested. Results of the impurity diffusion in silicide layer, the impurity segregation at both silicide/Si and oxide/silicide interfaces, contact stabilit of Al/TiN/TiSi2 structure, and device characteristics will be reported. Issues related to this process and its application to submicron device fabrication are discussed and foreseeable problem areas identified.


2002 ◽  
Vol 745 ◽  
Author(s):  
Erik Haralson ◽  
Tobias Jarmar ◽  
Johan Seger ◽  
Henry H. Radamson ◽  
Shi-Li Zhang ◽  
...  

ABSTRACTThe reactions of Ni with polycrystalline Si, Si0.82Ge0.18 and Si0.818Ge0.18C0.002 films in two different configurations during rapid thermal processing were studied. For the usually studied planar configuration with 20 nm thick Ni on 130–290 nm thick Si1-x-yGexCy, NiSi1-xGex(C) forms at 450°C on either Si0.82Ge0.18 or Si0.818Ge0.18C0.002, comparable to NiSi formed on Si. However, the agglomeration of NiSi1-xGex(C) on Si0.818Ge0.18C0.002 occurs at 625°C, about 50°C higher than that of NiSi1-xGex on Si0.82Ge0.18. For thin-film lateral diffusion couples, a 200-nm thick Ni film was in contact with 80–130 nm thick Si1-x-yGexCy through 1–10 μm sized contact openings in a 170 nm thick SiO2 isolation. While the Ni3Si phase was formed for both the Si0.82Ge0.18 and Si0.818Ge0.18C0.002 samples, the presence of 0.2 at.% C caused a slightly slower lateral growth.


1997 ◽  
Vol 70 (13) ◽  
pp. 1700-1702 ◽  
Author(s):  
R. Singh ◽  
K. C. Cherukuri ◽  
L. Vedula ◽  
A. Rohatgi ◽  
S. Narayanan

1993 ◽  
Vol 63 (1-4) ◽  
pp. 131-134 ◽  
Author(s):  
J.-M. Dilhac ◽  
C. Ganibal ◽  
N. Nolhier ◽  
P.B. Moynagh ◽  
C.P. Chew ◽  
...  

2000 ◽  
Vol 647 ◽  
Author(s):  
Sabina Spiga ◽  
Sandro Ferrari ◽  
Marco Fanciulli ◽  
Bernd Schmidt ◽  
Karl-Heinz Heinig ◽  
...  

AbstractIn this work we investigate the ion beam synthesis of Sn and Sb clusters in thin oxides. 80 keV (fluences of 0.1-1 × 1016 cm−2) Sn implantation in 85 nm thick SiO2, followed by annealing (800-1000°C for 30-300 sec under Ar or N 2 dry ambient) in a rapid thermal processing (RTP) system, leads to the formation of two cluster bands, near the middle of the SiO2 layer and the Si/SiO2 interface. In addition, big isolated clusters are randomly distributed between the two bands. Cluster-size distribution and cluster-crystallinity are related to implantation fluence and annealing time. Low energy (10-12 keV) Sb and Sn implantation (fluences 2-5 × 1015 cm−2) leads to the formation of very uniform cluster-size distribution. Under specific process conditions, only an interface cluster band is observed.


1986 ◽  
Vol 71 ◽  
Author(s):  
Tom Sedgwick

AbstractRapid Thermal Processing (RTP) can minimize processing time and therefore minimize dopant motion during annealing of ion implanted junctions. In spite of the advantage of short time annealing using RTP, the formation of shallow B junctions is thwarted by channeling, transient enhanced diffusion and concentration enhanced diffusion effects all of which lead to deeper B profiles. Channeling and transient enhanced diffusion can be avoided by preamorphizing the silicon before the B implant. However, defects at the original amorphous/crystal boundary persist after annealing. Very low energy B implantation can lead to very shallow dopant profiles and in spite of channeling effects, offers an attractive potential shallow junction technology. In all of the shallow junction formation techniques RTP is required to achieve both high activation of the implanted species and minimal diffusion of the implanted dopant.


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