Electrical Study of Metal/Gaas Interfaces

1989 ◽  
Vol 148 ◽  
Author(s):  
N. Newman ◽  
W.E. Spicer ◽  
E.R. Weber ◽  
Z. Liliental-Weber
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Electrical Measurements ◽  
Barrier Formation ◽  
Transmission Electron ◽  
In Situ Deposition ◽  
P Type ◽  
Induced Changes ◽  
Electrical Study

We have carried out a systematic study of the electrical properties of Schottky barriers formed on atomically-clean and contaminated n-type and p-type GaAs surfaces[1-11]. Diodes were fabricated by in-situ deposition on clean GaAs (110) surfaces prepared by cleavage in ultrahigh vacuum and on contaminated surfaces prepared by cleavage and exposure to the atmosphere[1-4]. The consistent and reproducible barrier height determinations from the electrical measurements of unannealed and annealed diodes, when combined with results of transmission electron microscopy (TEM)[5,6] and surface sensitive studies on identically prepared samples[7,8], are found to be a particularly critical test of models of Schottky barrier formation. A strong correlation between annealing-induced changes in the Schottky barrier height and the stoichiometry of the near interfacial GaAs is found.

Electrical Properties and Schottky Barriers of Metal-Semiconductor Interfaces

1990 ◽  
Vol 181 ◽  
Author(s):  
M.O. Aboelfotoh
Keyword(s):  
Electrical Properties ◽  
Temperature Dependence ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Fermi Level Pinning ◽  
Barrier Heights ◽  
Semiconductor Interfaces ◽  
Barrier Formation ◽  
Indirect Band Gap ◽  
P Type

ABSTRACTThe electrical properties of metal/Si(100) and metal/Ge(100) interfaces formed by the deposition of metal on both n-type and p-type Si(100) and Ge(100) have been studied in the temperature range 77-295 K with the use of current- and capacitance-voltage techniques. Compound formation is found to have very little or no effect on the Schottky-barrier height and its temperature dependence. For silicon, the barrier height and its temperature dependence are found to be affected by the metal. For germanium, on the other hand, the barrier height and its temperature dependence are unaffected by the metal. The temperature dependence of the Si and Ge barrier heights is found to deviate from the predictions of recent models of Schottky-barrier formation based on the suggestion of Fermi-level pinning in the center of the semiconductor indirect band gap.

Investigation of Pt Bottom Electrodes for "In-Situ" Deposited Pb(Zr,Ti)O3 (PZT) thin Films

1991 ◽  
Vol 243 ◽  
Author(s):  
Rainer Bruchhaus ◽  
Dana Pitzer ◽  
Oliver Eibl ◽  
Uwe Scheithauer ◽  
Wolfgang Hoesler
Keyword(s):  
Elevated Temperatures ◽  
Diffusion Processes ◽  
Rutherford Backscattering Spectrometry ◽  
Layer Sequence ◽  
Si Substrates ◽  
Transmission Electron ◽  
In Situ Deposition ◽  
Electron Spectrometry ◽  
Heating Up

AbstractThe deposition of the bottom electrode plays a key role in the fabrication of ferroelectric capacitors. Processing at elevated temperatures of up to 800°C can give rise to diffusion processes and thereof formation of harmful dielectric layers.In this paper we used Rutherford backscattering spectrometry (RBS), Auger electron spectrometry (AES) and transmission electron microscopy (TEM) to study Pt/Ti/SiO2/Si substrates with various thicknesses of the Ti and Pt layers. During heating up to about 450°C in vacuum the initial layer sequence remains unchanged. However, drastic changes occur when the electrodes are exposed to Ar/O2 atmosphere during heat treatment. Oxidation induced diffusion of Ti into Pt and oxidation of Ti were observed. A Pt electrode with a 100 nm thick Ti adhesion layer proved to be suitable for the "in-situ" deposition of PZT films.

scholarly journals Investigation of Barrier Inhomogeneities and Electronic Transport on Al-Foil/p-Type-4H-SiC Schottky Barrier Diodes Using Diffusion Welding

Crystals ◽  
2020 ◽  
Vol 10 (8) ◽  
pp. 636
Author(s):  
Mehadi Hasan Ziko ◽  
Ants Koel ◽  
Toomas Rang ◽  
Muhammad Haroon Rashid
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Ideality Factor ◽  
Doping Profile ◽  
Structural Defects ◽  
Diffusion Welding ◽  
Native Oxide Layer ◽  
Electrical Characteristics ◽  
Discrete Energy Level ◽  
P Type

The diffusion welding (DW) is a comprehensive mechanism that can be extensively used to develop silicon carbide (SiC) Schottky rectifiers as a cheaper alternative to existing mainstream contact forming technologies. In this work, the Schottky barrier diode (SBD) fabricated by depositing Al-Foil on the p-type 4H-SiC substrate with a novel technology; DW. The electrical properties of physically fabricated Al-Foil/4H-SiC SBD have been investigated. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics based on the thermionic emission model in the temperature range (300 K–450 K) are investigated. It has been found that the ideality factor and barrier heights of identically manufactured Al-Foil/p-type-4H-SiC SBDs showing distinct deviation in their electrical characteristics. An improvement in the ideality factor of Al-Foil/p-type-4H-SiC SBD has been noticed with an increase in temperature. An increase in barrier height in fabricated SBD is also observed with an increase in temperature. We also found that these increases in barrier height, improve ideality factors and abnormalities in their electrical characteristics are due to structural defects initiation, discrete energy level formation, interfacial native oxide layer formation, inhomogenous doping profile distribution and tunneling current formation at the SiC sufaces.

Schottky Barrier Height andS-Parameter of Ti, Cu, Pd, and Pt Contacts on p-Type GaN

2012 ◽  
Vol 51 (9S2) ◽  
pp. 09MK01 ◽  
Author(s):  
Youngjun Park ◽  
Kwang-Soon Ahn ◽  
Hyunsoo Kim
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Schottky Barrier Height ◽  
P Type

TEMPERATURE DEPENDENCE OF ELECTRICAL CHARACTERISTICS OF Cr/p–Si(100) SCHOTTKY BARRIER DIODES

2008 ◽  
Vol 22 (14) ◽  
pp. 2309-2319 ◽  
Author(s):  
K. ERTURK ◽  
M. C. HACIISMAILOGLU ◽  
Y. BEKTORE ◽  
M. AHMETOGLU
Keyword(s):  
Temperature Dependence ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Thermionic Emission ◽  
Electrical Characteristics ◽  
Schottky Barrier Diodes ◽  
Semiconductor Interface ◽  
Linear Portion ◽  
Barrier Heights ◽  
P Type

The electrical characteristics of Cr / p – Si (100) Schottky barrier diodes have been measured in the temperature range of 100–300 K. The I-V analysis based on thermionic emission (TE) theory has revealed an abnormal decrease of apparent barrier height and increase of ideality factor at low temperature. The conventional Richardson plot exhibits non-linearity below 200 K with the linear portion corresponding to activation energy 0.304 eV and Richardson constant (A*) value of 5.41×10-3 Acm-2 K -2 is determined from the intercept at the ordinate of this experimental plot, which is much lower than the known value of 32 Acm-2 K -2 for p-type Si . It is demonstrated that these anomalies result due to the barrier height inhomogeneities prevailing at the metal-semiconductor interface. Hence, it has been concluded that the temperature dependence of the I-V characteristics of the Cr/p – Si Schottky barrier diode can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. Furthermore, the value of the Richardson constant found is much closer than that obtained without considering the inhomogeneous barrier heights.

Schottky-barrier height tuning using dopant segregation in Schottky-barrier MOSFETs on fully-depleted SOI

2006 ◽  
Vol 913 ◽  
Author(s):  
Joachim Knoch ◽  
Min Zhang ◽  
Qing-Tai Zhao ◽  
Siegfried Mantl
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Field Effect Transistors ◽  
Interface Layer ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Fully Depleted ◽  
Dopant Segregation ◽  
P Type ◽  
Silicon Interface

AbstractIn this paper we demonstrate the use of dopant segregation during silicidation for decreasing the effective potential barrier height in Schottky-barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs). N-type as well as p-type devices are fabricated with arsenic/boron implanted into the device's source and drain regions prior to silicidation. During full nickel silicidation a highly doped interface layer is created due to dopants segregating at the silicide-silicon interface. This doped layer leads to an increased tunneling probability through the Schottky barrier and hence leads to significantly improved device characteristics. In addition, we show with simulations that employing ultrathin body (UTB) silicon-on-insulator and ultrathin gate oxides allows to further improve the device characteristics.

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