Nanoscale Electron-Beam Processes and Its Application to Nanodevices

In this paper, electron beam (EB) lithography and direct processes are summarized for application to nanometer-scale electron devices such as single electron transistor. As decreasing line width in lithography, the delineated patterns has fluctuation of line width, which is so-called line-edge-roughness. It is kwon that such a roughness is caused by aggregates of resist molecules. Therefore to avoid the rougphness to make smooth line edge, we have to use rather low molecular weight resist materials. As one of such candidates, EB exposure characteristics of thermally oxidized SiO2 film are described. Although the sensitivity of the resist is about a few C/cm2 which is lower than conventional resists, it is possible to delineate fine line and space pattern with 15 nm pitch and 5 nm width. This technique is extended to make miniature metal/insulator/metal junctions using SiO2/Si bilayer resist system and the following metal liftoff process. Metal layer is directly deposited on SiO2 substrates in WF6 gas ambient simultaneously with EB irradiation. The resistivity of the deposited film is about 6×10/4 Ωcm depending on hydrocarbon contamination of the substrate itself. We can make the deposited lines with line-width of about 10 nm using 3 nm diameter of the incident EB. From current-voltage characteristics for single tunnel junctions with various tunnel resistances, the barrier height is estimated to be about 0.2 eV. This result indicates clearly the junction properties can be controlled at least with the accuracy of minimum deflection increment of the EB system used here. It is successfully observed that single-electron-transistor produced by EB-induced deposition exhibits Coulomb oscillation at temperature of 230 K.