High-Performance Poly-Si TFTs with Multiple Selectively Doped Regions in the Active Layer

2000 ◽  
Vol 621 ◽  
Author(s):  
Min-Cheol Lee ◽  
Juhn-Suk Yoo ◽  
Kee-Chan Park ◽  
Sang-Hoon Jung ◽  
Min-Koo Han ◽  
...  

ABSTRACTWe have proposed and fabricated a new poly-Si TFT that employs selectively doped regions between the source and drain in order to reduce leakage current without the sacrifice of the on current. In the proposed poly-Si TFTs, the selectively doped regions where doping concentration is identical to that of source/drain, reduce the effective channel length during the on state. Under the off state, the selectively doped regions may reduce the lateral electric field induced in the depletion region near drain so that the leakage current reduces considerably. The experimental data of the proposed TFT shows that it has the high on-current, low leakage current and low threshold voltage when compared with conventional TFT. The fabrication steps for the proposed TFT are reduced because ion-implantation for source/drain and selectively doped regions is performed simultaneously prior to an excimer laser irradiation. It should be noted that, in the proposed TFT, only one excimer laser annealing is required while two excimer laser annealing steps are required in conventional TFT.

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.


1997 ◽  
Vol 471 ◽  
Author(s):  
Jae-Hong Jeon ◽  
Cheol-Min Park ◽  
Hong-Seok Choi ◽  
Cheon-Hong Kim ◽  
Min-Koo Han

ABSTRACTWe have proposed the new poly-Si TFT which reduces the leakage current effectively by employing highly resistive a-Si region in the channel. The active layer of proposed device is crystallized selectively by employing excimer laser annealing while the both sides of channel near the source/drain are not recrystallized and remained as a-Si. Unlikely LDD or offset structure, the a-Si region which is designed to reduce the leakage current acts as the conduction channel of carriers under the ON state, so that the ON current is decreased very little. The selectively crystallized active layer can be fabricated by irradiating the excimer laser through ITO film of which transmittance at the wave length of laser is selectively adjusted. In the course of fabricating the proposed device, any additional photo masking step is not necessary and misalign problem is eliminated. The experimental results show that the ON/OFF current ratio of proposed poly-Si TFT is 106 while that of conventional one is 105.


2001 ◽  
Vol 685 ◽  
Author(s):  
Ching-Wei Lin ◽  
Li-Jing Cheng ◽  
Yin-Lung Lu ◽  
Huang-Chung Cheng

AbstractA simple process sequence for fabrication of low temperature polysilicon (LTPS) TFTs with self-aligned graded LDD structure was demonstrated. The graded LDD structure was self-aligned by side-etch of Al under the photo-resist followed by excimer laser irradiation for dopant activation and laterally diffusion. The graded LDD polysilicon TFTs were suitable for high-speed operation and active matrix switches applications because they possessed low-leakage-current characteristic without sacrificing driving capability significantly and increasing overlap capacitance. The leakage current of graded LDD polysilicon TFTs at Vd = 5V and Vg = −10V could attain to below 1pA/μm without any hygrogenation process, when proper LDD length and laser activation process were applied. The on/off current ratios of these devices were also above 108. Furthermore, due to graded dopant distribution in LDD regions, the drain electric field could be reduced further, and as a result, graded LDD polysilicon TFTs provided high reliability for high voltage operation.


2001 ◽  
Author(s):  
Christophe Prat ◽  
Dorian Zahorski ◽  
Youri Helen ◽  
Taieb Mohammed-Brahim ◽  
Olivier Bonnaud

2001 ◽  
Vol 685 ◽  
Author(s):  
J.P. Lu ◽  
K. Van Schuylenbergh ◽  
R. T. Fulks ◽  
J. Ho ◽  
Y. Wang ◽  
...  

AbstractPulsed Excimer-Laser Annealing (ELA) has become an important technology to produce high performance, poly-Si Thin Film Transistors (TFTs) for large area electronics. The much-improved performance of these poly-Si TFTs over the conventional hydrogenated amorphous Si TFTs enables the possibility of building next generation flat panel imagers with higher-level integration and better noise performance. Both the on-glass integration of peripheral driver electronics to reduce the cost of interconnection and the integration of a pixel level amplifier to improve the noise performance of large area imagers have been demonstrated and are discussed in this paper.


1991 ◽  
Author(s):  
Takashi Noguchi ◽  
Hironori Tsukamoto ◽  
Toshiharu Suzuki ◽  
Haruko Masuya

1991 ◽  
Vol 30 (Part 1, No. 12B) ◽  
pp. 3700-3703 ◽  
Author(s):  
Hiroyuki Kuriyama ◽  
Seiichi Kiyama ◽  
Shigeru Noguchi ◽  
Takashi Kuwahara ◽  
Satoshi Ishida ◽  
...  

2015 ◽  
Vol 27 (14) ◽  
pp. 1485-1488 ◽  
Author(s):  
Chen Wang ◽  
Cheng Li ◽  
Jiangbin Wei ◽  
Guangyang Lin ◽  
Xiaoling Lan ◽  
...  

1996 ◽  
Vol 35 (Part 1, No. 3) ◽  
pp. 1751-1757 ◽  
Author(s):  
Ho Sung Cho ◽  
Dong Hoon Jang ◽  
Jung Kee Lee ◽  
Kyung Hyun Park ◽  
Jeong Soo Kim ◽  
...  

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