Short gate length AlGaN/GaN HEMTs

2000 ◽  
Vol 622 ◽  
Author(s):  
O. Breitschädel ◽  
L. Kley ◽  
H. Gräbeldinger ◽  
B. Kuhn ◽  
F. Scholz ◽  
...  

ABSTRACTWe report on our progress on the fabrication of AlGaN/GaN HEMTs with extremely short gate length. AlGaN/GaN HEMTs with different gate length from 6 νm down to 60nm were fabricated to investigate DC- and high frequency behavior as well as short channel effects. We have found that the transistors with gates in the 100 nm range can be improved in the device performance with respect to transconductance and high frequency but shows also short channel effects as the loss of saturation in the output characteristics and a strong dependency of the threshold voltage on the gate length.

2020 ◽  
Vol 16 (2) ◽  
Author(s):  
Safayet Ahmed ◽  
Md. Tanvir Hasan

The effect of oxide thickness (EOT) on GaN-based double gate (DG) MOSFETs have been explored for low power switching device. The gate length (LG) of 8 nm with 4 nm underlap is considered. The device is turned off and on for gate voltage (VGS) of 0 V and 1 V, respectively. The effective oxide thickness (EOT) is varied from 1 nm to 0.5 nm and the device performance is evaluated. For EOT = 0.5 nm, the OFF-state current (IOFF), subthreshold slope (SS) and drain induced barrier lowering (DIBL) are obtained 2.97×10-8 A/μm, 69.67 mV/dec and 21.753 mV/V, respectively. These results indicate that, it is possible to minimize short channel effects (SCEs) by using smaller value of EOT.


2001 ◽  
Vol 82 (1-3) ◽  
pp. 238-240 ◽  
Author(s):  
O Breitschädel ◽  
L Kley ◽  
H Gräbeldinger ◽  
J.T Hsieh ◽  
B Kuhn ◽  
...  

2020 ◽  
Vol 67 (8) ◽  
pp. 3088-3094
Author(s):  
Mojtaba Allaei ◽  
Majid Shalchian ◽  
Farzan Jazaeri

2015 ◽  
Vol 62 (5) ◽  
pp. 1411-1418 ◽  
Author(s):  
Yanbo Zhang ◽  
Huilong Zhu ◽  
Hao Wu ◽  
Yongkui Zhang ◽  
Zhiguo Zhao ◽  
...  

2011 ◽  
Vol 1282 ◽  
Author(s):  
David A. J. Moran ◽  
Donald A. MacLaren ◽  
Samuele Porro ◽  
Richard Hill ◽  
Helen McLelland ◽  
...  

ABSTRACTHydrogen terminated diamond field effect transistors (FET) of 50nm gate length have been fabricated, their DC operation characterised and their physical and chemical structure inspected by Transmission Electron Microscopy (TEM) and Electron Energy Loss Spectroscopy (EELS). DC characterisation of devices demonstrated pinch-off of the source-drain current can be maintained by the 50nm gate under low bias conditions. At larger bias, off-state output conductance increases, demonstrating most likely the onset of short-channel effects at this reduced gate length.


2019 ◽  
Vol 15 (4) ◽  
pp. 609-612
Author(s):  
Kim Ho Yeap ◽  
Jun Yi Lee ◽  
Wei Long Yeo ◽  
Humaira Nisar ◽  
Siu Hong Loh

This paper presents the design, characterization, and analysis of a 10 nm silicon negative channel FinFET. To validate the design, we have simulated the output characteristics and transfer characteristics of the transistor. Both of which comply with the standard characteristics of an operational MOSFET. Owing to its efficacy in suppressing short channel effects, the leakage current of the tri-gate transistor is found to be low; whereas, the drive current is sufficiently high. We have also presented the design specifications of the transistor.


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