Monolithic Integration of Electronics and Sub-wavelength Metal Optics in Deep Submicron CMOS Technology

2005 ◽  
Vol 869 ◽  
Author(s):  
Peter B. Catrysse

AbstractThe structures that can be implemented and the materials that are used in complementary metal-oxide semiconductor (CMOS) integrated circuit (IC) technology are optimized for electronic performance. However, they are also suitable for manipulating and detecting optical signals. In this paper, we show that while CMOS scaling trends are motivated by improved electronic performance, they are also creating new opportunities for controlling and detecting optical signals at the nanometer scale. For example, in 90-nm CMOS technology the minimum feature size of metal interconnects reaches below 100 nm. This enables the design of nano-slits and nano-apertures that allow control of optical signals at sub-wavelength dimensions. The ability to engineer materials at the nanoscale even holds the promise of creating meta-materials with optical properties, which are unlike those found in the world around us. As an early example of the monolithic integration of electronics and sub-wavelength metal optics, we focus on integrated color pixels (ICPs), a novel color architecture for CMOS image sensors. Following the trend of increased integration in the field of CMOS image sensors, we recently integrated color-filtering capabilities inside image sensor pixels. Specifically, we demonstrated wavelength selectivity of sub-wavelength patterned metal layers in a 180-nm CMOS technology. To fulfill the promise of monolithic photonic integration and to design useful nanophotonic components, such as those employed in ICPs, we argue that analytical models capturing the underlying physical mechanisms of light-matter interaction are of utmost importance.

Sensors ◽  
2019 ◽  
Vol 19 (9) ◽  
pp. 2073 ◽  
Author(s):  
Kazunari Kurita ◽  
Takeshi Kadono ◽  
Satoshi Shigematsu ◽  
Ryo Hirose ◽  
Ryosuke Okuyama ◽  
...  

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.


Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1329 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.


2021 ◽  
Author(s):  
Jun Long Zhang

A CMOS image sensor consists of a light sensing region that converts photonic energy to an electrical signal and a peripheral circuitry that performs signal conditioning and post-processing. This project investgates the principle and design of CMOS active image sensors. The basic concepts and principle of CMOS image sensors are investigated. The advantages of CMOS image sensors over charge-coupled device (CCD) image sensors are presented. Both passive pixel sensors (PPS) and acive pixel sensors (APS) are examined in detail. The noise of CMOS image sensors is investigated and correlated double sampling (CDS) techniques are examined. The design of APS arrays, CDS circuits and 8-bit analog to-digital converters in TSMC-0.18μm 1.8V CMOS technology is presented. The simulation results and layout of the designed CMOS image sensor are presented.


Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 299
Author(s):  
Luis Miguel Carvalho Freitas ◽  
Fernando Morgado-Dias

Modern Complementary Metal-Oxide-Semiconductor (CMOS) image sensors, aimed to target low-noise and fast digital outputs, are fundamentally based on column-parallel structures, jointly designed with oversampling column converters. The typical choice for the employed column converters is the incremental sigma-delta structures, which intrinsically perform the correlated multiple sampling, creating an averaging effect over the system thermal noise when used in conjunction with 4T-pinned pixels. However, these types of column converters are known to be power-hungry, especially if the imaging device needs to target high frame rate levels as well. In this sense, the aim of this paper was to address the excess of power dissipation problem that arises from image sensors while employing oversampling high-order incremental converters, by means of using a different connection scheme to supply and to drive the required reference signals across the image sensor on-chip column converters. The proposed connection scheme revealed to be fully functional with no unwanted artifacts in the imager output response, allowing it to avoid 20% to 50% of the power dissipation, relative to the classical on-chip references generation and driving method. Furthermore, this solution allows for a much less complicated and less crowded printed circuit board (PCB) system.


Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5203
Author(s):  
Alessandro Tontini ◽  
Leonardo Gasparini ◽  
Matteo Perenzoni

We present a Montecarlo simulator developed in Matlab® for the analysis of a Single Photon Avalanche Diode (SPAD)-based Complementary Metal-Oxide Semiconductor (CMOS) flash Light Detection and Ranging (LIDAR) system. The simulation environment has been developed to accurately model the components of a flash LIDAR system, such as illumination source, optics, and the architecture of the designated SPAD-based CMOS image sensor. Together with the modeling of the background noise and target topology, all of the fundamental factors that are involved in a typical LIDAR acquisition system have been included in order to predict the achievable system performance and verified with an existing sensor.


Sensor Review ◽  
2016 ◽  
Vol 36 (3) ◽  
pp. 231-239 ◽  
Author(s):  
Luiz Carlos Paiva Gouveia ◽  
Bhaskar Choubey

Purpose The purpose of this paper is to offer an introduction to the technological advances of the complementary metal–oxide–semiconductor (CMOS) image sensors along the past decades. The authors review some of those technological advances and examine potential disruptive growth directions for CMOS image sensors and proposed ways to achieve them. Design/methodology/approach Those advances include breakthroughs on image quality such as resolution, capture speed, light sensitivity and color detection and advances on the computational imaging. Findings The current trend is to push the innovation efforts even further, as the market requires even higher resolution, higher speed, lower power consumption and, mainly, lower cost sensors. Although CMOS image sensors are currently used in several different applications from consumer to defense to medical diagnosis, product differentiation is becoming both a requirement and a difficult goal for any image sensor manufacturer. The unique properties of CMOS process allow the integration of several signal processing techniques and are driving the impressive advancement of the computational imaging. Originality/value The authors offer a very comprehensive review of methods, techniques, designs and fabrication of CMOS image sensors that have impacted or will impact the images sensor applications and markets.


2021 ◽  
Author(s):  
Jun Long Zhang

A CMOS image sensor consists of a light sensing region that converts photonic energy to an electrical signal and a peripheral circuitry that performs signal conditioning and post-processing. This project investgates the principle and design of CMOS active image sensors. The basic concepts and principle of CMOS image sensors are investigated. The advantages of CMOS image sensors over charge-coupled device (CCD) image sensors are presented. Both passive pixel sensors (PPS) and acive pixel sensors (APS) are examined in detail. The noise of CMOS image sensors is investigated and correlated double sampling (CDS) techniques are examined. The design of APS arrays, CDS circuits and 8-bit analog to-digital converters in TSMC-0.18μm 1.8V CMOS technology is presented. The simulation results and layout of the designed CMOS image sensor are presented.


Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor~(CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive-sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realizes super field-of-view imaging without lenses or coding masks, and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.


2022 ◽  
Author(s):  
Houk Jang ◽  
Henry Hinton ◽  
Woo-Bin Jung ◽  
Min-Hyun Lee ◽  
Changhyun Kim ◽  
...  

Abstract Complementary metal-oxide-semiconductor (CMOS) image sensors are a visual outpost of many machines that interact with the world. While they presently separate image capture in front-end silicon photodiode arrays from image processing in digital back-ends, efforts to process images within the photodiode array itself are rapidly emerging, in hopes of minimizing the data transfer between sensing and computing, and the associated overhead in energy and bandwidth. Electrical modulation, or programming, of photocurrents is requisite for such in-sensor computing, which was indeed demonstrated with electrostatically doped, but non-silicon, photodiodes. CMOS image sensors are currently incapable of in-sensor computing, as their chemically doped photodiodes cannot produce electrically tunable photocurrents. Here we report in-sensor computing with an array of electrostatically doped silicon p-i-n photodiodes, which is amenable to seamless integration with the rest of the CMOS image sensor electronics. This silicon-based approach could more rapidly bring in-sensor computing to the real world due to its compatibility with the mainstream CMOS electronics industry. Our wafer-scale production of thousands of silicon photodiodes using standard fabrication emphasizes this compatibility. We then demonstrate in-sensor processing of optical images using a variety of convolutional filters electrically programmed into a 3 × 3 network of these photodiodes.


2010 ◽  
Vol 2010 (DPC) ◽  
pp. 000539-000556
Author(s):  
Dave Thomas ◽  
Jean Michailos ◽  
Nicolas Hotellier ◽  
Gilles Metellus ◽  
Francois Guyader ◽  
...  

One of the first device types to benefit from TSV implementation is the CMOS image sensor, an image capture device designed to combine high image quality within a compact form-factor that can be mass produced at low cost. End markets include mobile phones, PDAs and gaming consoles. STMicroelectronics is pioneering their production, based on ≤65nm CMOS technology, at its 300mm facility in Crolles. These sensors employ TSVs as part of a wafer level package allowing the camera module to be directly soldered to a phone PCB thereby saving cost, space and time to manufacture. SPTS's Versalis fxP system is being used to combine multiple TSV formation processes onto one platform including hard-mask deposition, hard-mask etching, TSV etching, partial PMD etching, dielectric liner deposition and spacer etching to define the area for the metal contact. All processes are carried out on a silicon wafer bonded to a glass carrier, through which the final device is illuminated. We will present a TSV silicon etch process for 70 μm x 70 μm Vias in a thinned 300mm silicon wafer on glass carriers with an etch rate uniformity of ≤±1% and sidewall scalloping in the range 80–210 nm. We will show that this process can be conveniently mixed in production with the various oxide etches. A PECVD dielectric liner deposited at <200 °C having excellent coverage, thermal stability and adhesion combined with a breakdown voltage >8 MVcm−1 and leakage current <1E-7 Acm−2 will also be described. Process integration aspects will be discussed using high resolution SEMS to show the key material interfaces in critical areas such as feature corners and along sidewalls. Furthermore the successful implementation of TSV technology on ST's CMOS image sensors will be demonstrated through a combination of electrical characteristics, parametric device data and overall device performance/reliability.


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