On-chip boost regulator with projected off- and on-time control

2009 ◽  
Vol 10 (8) ◽  
pp. 1223-1230 ◽  
Author(s):  
Xiao-ru Xu ◽  
Meng-lian Zhao ◽  
Xiao-bo Wu
Keyword(s):  
2015 ◽  
Vol 30 (4) ◽  
pp. 2096-2107 ◽  
Author(s):  
Lin Cheng ◽  
Jinhua Ni ◽  
Yao Qian ◽  
Minchao Zhou ◽  
Wing-Hung Ki ◽  
...  

2019 ◽  
Vol 5 (1) ◽  
pp. eaat1451 ◽  
Author(s):  
Kai-Hong Luo ◽  
Sebastian Brauner ◽  
Christof Eigner ◽  
Polina R. Sharapova ◽  
Raimund Ricken ◽  
...  

Future quantum computation and networks require scalable monolithic circuits, which incorporate various advanced functionalities on a single physical substrate. Although substantial progress for various applications has already been demonstrated on different platforms, the range of diversified manipulation of photonic states on demand on a single chip has remained limited, especially dynamic time management. Here, we demonstrate an electro-optic device, including photon pair generation, propagation, electro-optical path routing, as well as a voltage-controllable time delay of up to ~12 ps on a single Ti:LiNbO3waveguide chip. As an example, we demonstrate Hong-Ou-Mandel interference with a visibility of more than 93 ± 1.8%. Our chip not only enables the deliberate manipulation of photonic states by rotating the polarization but also provides precise time control. Our experiment reveals that we have full flexible control over single-qubit operations by harnessing the complete potential of fast on-chip electro-optic modulation.


2004 ◽  
Vol 16 (2) ◽  
pp. 194-199 ◽  
Author(s):  
Nobuyuki Yamasaki ◽  

This paper describes the design concept of Responsive MultiThreaded (RMT) Processor for distributed real-time control that controls various embedded systems including robots, home automation, factory automation, etc. RMT processor integrates an 8-way multithreaded processor (RMT processing unit) for real-time processing, four sets of Responsive Link II for real-time communication, and I/O peripherals including DDR SDRAM I/Fs, DMAC, PCI64, USB2.0, IEEE1394, PWM generators, pulse counters, etc., into an ASIC chip. System designers can use various on-chip functions easily by connecting required I/Os to this chip directly. The designers can also realize distributed control systems by connecting several RMT processors with their own functions via Responsive Link II.


2013 ◽  
Vol 6 (2) ◽  
pp. 383-391 ◽  
Author(s):  
Wen‐Wei Chen ◽  
Jiann‐Fuh Chen ◽  
Tsorng‐Juu Liang ◽  
Jian‐Rong Huang ◽  
Lu‐Chi Wei ◽  
...  

2017 ◽  
Vol 6 (4) ◽  
pp. 358-363
Author(s):  
R. Dorothy ◽  
Sasilatha T.

Current control systems and emulation systems (Hardware-in-the-Loop, HIL or Processor-in-the-Loop, PIL) for high-end power-electronic applications often consist of numerous components and interlinking busses: a micro controller for communication and high level control, a DSP for real-time control, an FPGA section for fast parallel actions and data acquisition, multiport RAM structures or bus systems as interconnecting structure. System-on-Chip (SoC) combines many of these functions on a single die. This gives the advantage of space reduction combined with cost reduction and very fast internal communication. Such systems become very relevant for research and also for industrial applications. The SoC used here as an example combines a Dual-Core ARM 9 hard processor system (HPS) and an FPGA, including fast interlinks between these components. SoC systems require careful software and firmware concepts to provide real-time control and emulation capability. This paper demonstrates an optimal way to use the resources of the SoC and discusses challenges caused by the internal structure of SoC. The key idea is to use asymmetric multiprocessing: One core uses a bare-metal operating system for hard real time. The other core runs a “real-time” Linux for service functions and communication. The FPGA is used for flexible process-oriented interfaces (A/D, D/A, switching signals), quasi-hard-wired protection and the precise timing of the real-time control cycle. This way of implementation is generally known and sometimes even suggested–but to the knowledge of the author’s seldomly implemented and documented in the context of demanding real-time control or emulation. The paper details the way of implementation, including process interfaces, and discusses the advantages and disadvantages of the chosen concept. Measurement results demonstrate the properties of the solution.


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