Design Concept of Responsive Multithreaded Processor for Distributed Real-Time Control

2004 ◽  
Vol 16 (2) ◽  
pp. 194-199 ◽  
Author(s):  
Nobuyuki Yamasaki ◽  

This paper describes the design concept of Responsive MultiThreaded (RMT) Processor for distributed real-time control that controls various embedded systems including robots, home automation, factory automation, etc. RMT processor integrates an 8-way multithreaded processor (RMT processing unit) for real-time processing, four sets of Responsive Link II for real-time communication, and I/O peripherals including DDR SDRAM I/Fs, DMAC, PCI64, USB2.0, IEEE1394, PWM generators, pulse counters, etc., into an ASIC chip. System designers can use various on-chip functions easily by connecting required I/Os to this chip directly. The designers can also realize distributed control systems by connecting several RMT processors with their own functions via Responsive Link II.

2004 ◽  
Vol 16 (2) ◽  
pp. 217-224 ◽  
Author(s):  
Tetsuya Taira ◽  
◽  
Nobuyuki Yamasaki

This paper explains the design and implementation of functionally distributed control architecture that realizes real-time control of autonomous mobile robots. To operate successfully in human society, autonomous mobile robots must achieve both local and global control in real-time. We focus on robots operating in parallel, such as moving while sensing, and propose a functionally distributed control architecture designed as a parallel/distributed computer consisting of many functionally distributed modules. Each module has an exclusive Processing Unit (PU) that processes one function of robot, such as image processing, auditory processing, and wheel control, independently in real-time. The robot can perform global action by cooperating with such modules. We then evaluate the efficiency of the proposed architecture by implementing prototype robots based on this architecture.


2020 ◽  
Author(s):  
Manh Duong Phung

This study presents an inspecting system using real-time control unmanned aerial vehicles (UAVs) to investigate structural surfaces. The system operates under favourable weather conditions to inspect a target structure, which is the Wentworth light rail base structure in this study. The system includes a drone, a GoPro HERO4 camera, a controller and a mobile phone. The drone takes off the ground manually in the testing field to collect the data requiring for later analysis. The images are taken through HERO 4 camera and then transferred in real time to the remote processing unit such as a ground control station by the wireless connection established by a Wi-Fi router. An image processing method has been proposed to detect defects or damages such as cracks. The method based on intensity histogram algorithms to exploit the pixel group related to the crack contained in the low intensity interval. Experiments, simulation and comparisons have been conducted to evaluate the performance and validity of the proposed system.


2017 ◽  
Vol 6 (4) ◽  
pp. 358-363
Author(s):  
R. Dorothy ◽  
Sasilatha T.

Current control systems and emulation systems (Hardware-in-the-Loop, HIL or Processor-in-the-Loop, PIL) for high-end power-electronic applications often consist of numerous components and interlinking busses: a micro controller for communication and high level control, a DSP for real-time control, an FPGA section for fast parallel actions and data acquisition, multiport RAM structures or bus systems as interconnecting structure. System-on-Chip (SoC) combines many of these functions on a single die. This gives the advantage of space reduction combined with cost reduction and very fast internal communication. Such systems become very relevant for research and also for industrial applications. The SoC used here as an example combines a Dual-Core ARM 9 hard processor system (HPS) and an FPGA, including fast interlinks between these components. SoC systems require careful software and firmware concepts to provide real-time control and emulation capability. This paper demonstrates an optimal way to use the resources of the SoC and discusses challenges caused by the internal structure of SoC. The key idea is to use asymmetric multiprocessing: One core uses a bare-metal operating system for hard real time. The other core runs a “real-time” Linux for service functions and communication. The FPGA is used for flexible process-oriented interfaces (A/D, D/A, switching signals), quasi-hard-wired protection and the precise timing of the real-time control cycle. This way of implementation is generally known and sometimes even suggested–but to the knowledge of the author’s seldomly implemented and documented in the context of demanding real-time control or emulation. The paper details the way of implementation, including process interfaces, and discusses the advantages and disadvantages of the chosen concept. Measurement results demonstrate the properties of the solution.


Robotica ◽  
1991 ◽  
Vol 9 (1) ◽  
pp. 93-98 ◽  
Author(s):  
H. S. Park ◽  
H. S. Cho

SUMMARYA robotic manipulator is usually a very complicated system whose dynamics is too complicated time consuming for real-time control. The authors propose general criteria for designing an ideal robot whose dynamics is very much simpler than that of the conventional one. In this paper, dynamic characteristics of an ideally designed robot are investigated. The design guidelines were applied to a 6-degree-of-freedom PUMA 560 robot. Based upon the design concept dynamic equations of the redesigned robot were derived. Utilizing these equations, dynamic characteristics of the redesigned robot are investigated with respect to the computation efforts required, variation of the inertia matrix, joint input torque chracteristics, and couplings between the joints. A detailed comparison study is also made between the redesigned and conventional robots.


2005 ◽  
Vol 17 (2) ◽  
pp. 130-141 ◽  
Author(s):  
Nobuyuki Yamasaki ◽  

The Responsive MultiThreaded (RMT) Processor is a system LSI that integrates almost all functions for parallel/distributed real-time systems including robots, intelligent rooms/buildings, ubiquitous computing systems, and amusement systems. Concretely, the RMT Processor integrates real-time processing (RMT Processing Unit), real-time communication (Responsive Link II), computer I/O peripherals (DDR SDRAM I/Fs, DMAC, PCI-X, USB2.0, IEEE1394, etc.), and control I/O peripherals (PWM generators, pulse counters, etc.). The RMT Processor, with a design rule of 0.13<I>μ</I>m CMOS Cu 1P8M and a die size 10.0mm square, was fabricated by TSMC. The RMT Processing Unit (RMT PU) executes eight prioritized threads simultaneously using fine-grained multithreading based on priority, called the RMT architecture. Priority of real-time systems is introduced into all functional units, including cache, fetch, and execution, so the RMT PU guarantees real-time execution of prioritized threads. If resource conflicts occur at functional units, higher priority threads overtake lower priority threads. Flexible powerful vector operation units for multimedia processing are also designed. System designers use on-chip functions easily by connecting required I/Os to this chip and the designers realize distributed control by connecting several RMT Processors with their own functions via Responsive Link II.


1995 ◽  
Vol 34 (05) ◽  
pp. 475-488
Author(s):  
B. Seroussi ◽  
J. F. Boisvieux ◽  
V. Morice

Abstract:The monitoring and treatment of patients in a care unit is a complex task in which even the most experienced clinicians can make errors. A hemato-oncology department in which patients undergo chemotherapy asked for a computerized system able to provide intelligent and continuous support in this task. One issue in building such a system is the definition of a control architecture able to manage, in real time, a treatment plan containing prescriptions and protocols in which temporal constraints are expressed in various ways, that is, which supervises the treatment, including controlling the timely execution of prescriptions and suggesting modifications to the plan according to the patient’s evolving condition. The system to solve these issues, called SEPIA, has to manage the dynamic, processes involved in patient care. Its role is to generate, in real time, commands for the patient’s care (execution of tests, administration of drugs) from a plan, and to monitor the patient’s state so that it may propose actions updating the plan. The necessity of an explicit time representation is shown. We propose using a linear time structure towards the past, with precise and absolute dates, open towards the future, and with imprecise and relative dates. Temporal relative scales are introduced to facilitate knowledge representation and access.


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