scholarly journals Multi tapped delay line time-interval measurement system implemented in a programmable structure

ACTA IMEKO ◽  
2014 ◽  
Vol 3 (3) ◽  
pp. 43 ◽  
Author(s):  
Marek Zielinski ◽  
Dariusz Chaberski ◽  
Maciej Gurski ◽  
Marcin Kowalski

This paper describes a time-interval measurement system with increased resolution using multiple taped delay lines. In this time-interval measurement system, sixteen time-stamps are registered during a single measuring cycle (one shot). It means that the value of the measured time-interval can be interpolated with higher resolution without increasing the number of measurements or the interpolation time. Limiting the total measurement time reduces the energy consumption which is particularly important in battery powered systems.

ACTA IMEKO ◽  
2015 ◽  
Vol 4 (1) ◽  
pp. 77
Author(s):  
Marek Zielinski ◽  
Maciej Gurski ◽  
Dariusz Chaberski

This paper describes the architecture of a Multi-Tap-Delay-Line (MTDL) time-interval measurement module of high resolution implemented in a single FPGA device. The new architecture of the measurement module enables to collect sixteen time-stamps during a single measuring cycle. It means that the measured time-interval can be precisely interpolated from the collection of the sixteen time-stamps after each measuring cycle. Such architecture of the measurement module leads directly to an increased resolution, to a limited total measurement time and a decreased duty cycle of the measurement instrument.


2014 ◽  
Vol 668-669 ◽  
pp. 940-943
Author(s):  
Bao Feng Zhang ◽  
Zi Ming Xie ◽  
Zhi Wei Li ◽  
Jun Chao Zhu

For single channel sound velocity measurement system accuracy was generally not high,a high-precision dual-channel sound velocity of seawater measurement system was designed.Based on ultrasonic speed of sound measurement in seawater with time-of-flight method,the system used ARM microcontroller to combine with high-precision time interval measurement chip,and the sound velocity measurement was translated into distance and time measurement. Then the influence of the time delay of the system was eliminated by method of difference.The paper introduced the modules of the system,and the high-precision time interval measurement method as the key technology of time-of-flight method for the velocity measurement system was expounded.It wasproved by experiment that the measurement accuracy of the system on the velocity reached 0.019m/s.


2015 ◽  
Vol 30 (1) ◽  
pp. 83-88 ◽  
Author(s):  
岱钦 DAI Qin ◽  
毛有明 MAO You-ming ◽  
吴凯旋 WU Kai-xuan ◽  
吴杰 WU Jie ◽  
李业秋 LI Ye-qiu

2014 ◽  
Vol 21 (2) ◽  
pp. 305-316 ◽  
Author(s):  
Sławomir Grzelak ◽  
Jarosław Czoków ◽  
Marcin Kowalski ◽  
Marek Zieliński

Abstract The ultrasonic flowmeter which is described in this paper, measures the transit of time of an ultrasonic pulse. This device consists of two ultrasonic transducers and a high resolution time interval measurement module. An ultrasonic transducer emits a characteristic wave packet (transmit mode). When the transducer is in receive mode, a characteristic wave packet is formed and it is connected to the time interval measurement module inputs. The time interval measurement module allows registration of transit time differences of a few pulses in the packet. In practice, during a single measuring cycle a few time-stamps are registered. Moreover, the measurement process is also synchronous and, by applying the statistics, the time interval measurement uncertainty improves even in a single measurement. In this article, besides a detailed discussion on the principle of operation of the ultrasonic flowmeter implemented in the FPGA structure, also the test results are presented and discussed


2011 ◽  
Vol 301-303 ◽  
pp. 995-1000
Author(s):  
Xin Gang Wang ◽  
Fei Wang ◽  
Hai Gang Yang

This paper presents a Vernier Delay Line (VDL) for time interval measurement. A dedicated multiplexer is inserted into each stage of the proposed VDL. As a result, the D-flip-flops in each stage can be served as a large delay cell as well as a traditional arbiter. Moreover, the proposed interface circuit can save time residue out for further fine granularity measurement. Experimental results show that the proposed VDL achieves a 30ns measurement range with 6600 transistors.


2014 ◽  
Vol 21 (1) ◽  
pp. 77-84 ◽  
Author(s):  
Sławomir Grzelak ◽  
Marcin Kowalski ◽  
Jarosław Czoków ◽  
Marek Zieliński

Abstract The designing process of high resolution time interval measurement systems creates many problems that need to be eliminated. The problems are: the latch error, the nonlinearity conversion, the different duty cycle coefficient of the clock signal, and the clock signal jitter. Factors listed above affect the result of measurement. The FPGA (Field Programmable Gate Array) structure also imposes some restrictions, especially when a tapped delay line is constructed. The article describes the high resolution time-to-digital converter, implemented in a FPGA structure, and the types of errors that appear there. The method of minimization and processing of data to reduce the influence of errors on the measurement is also described.


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