scholarly journals Design and Simulation of Silicon Nanowire Tunnel Field Effect Transistor

Author(s):  
Parveen Kumar ◽  
Balwinder Raj

This paper analyses the different parameters of tunnel field-effect transistor (TFET) based on silicon Nanowire in vertical nature by using a Gaussian doping profile. The device has been designed using an n-channel P+-I-N+ structure for tunneling junction of TFET with gate-all-around (GAA) Nanowire structure. The gate length has been taken as 100 nm using silicon Nanowire to obtain the various parameters such as ON-current (ION), OFF-current (IOFF), current ratio, and Subthreshold slope (SS) by applying different values of work function at the gate, the radius of Nanowire and oxide thickness of the device. The simulations are performed on Silvaco TCAD which gives a better parametric analysis over conventional tunnel field-effect transistor.

2019 ◽  
Author(s):  
Ahmed Shaker ◽  
Ahmed Maged ◽  
Ali Elshorbagy ◽  
Abdallh AbouElainain ◽  
Mona Elsabbagh

In this paper, a new source-all-around tunnel field-effect transistor (SAA-TFET) is proposed and investigated by using TCAD simulation. The tunneling junction in the SAA-TFET is divided laterally and vertically with respect to the channel direction which provides a relatively large tunneling junction area. An n+ pocket design is also introduced around the source to enhance tunneling rates and improve the device characteristics. In addition, the gate and n+ pocket region also overlap in the vertical and the lateral directions resulting in an enhanced electric field and, in turn, the ON-state current of the SAA-TFET is highly increased compared with the conventional TFET. Promising results in terms of DC (I ON , I OFF , ON/OFF current ratio and SS) and analog (cutoff frequency) performance are obtained for low (V DD = 0.5 V) and high (V DD = 1 V) supply voltages.


Sign in / Sign up

Export Citation Format

Share Document