scholarly journals Comparative study of low-pass filter and phase-locked loop type speed filters for sensorless control of AC drives

2017 ◽  
Vol 1 (2) ◽  
pp. 207-215 ◽  
Author(s):  
Dong Wang ◽  
Kaiyuan Lu ◽  
Peter Omand Rasmussen ◽  
Zhenyu Yang
Keyword(s):  
Comparative Study ◽  
Sensorless Control ◽  
Phase Locked Loop ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Ac Drives ◽  
Low Pass

APPLICATION OF THE PLL CONTROL AT THE REALIZATION OF A 16-THROUGH ADC

2018 ◽  
pp. 6-12 ◽  
Author(s):  
R. V. Magerramov
Keyword(s):  
Electronic Device ◽  
Phase Locked Loop ◽  
Low Noise ◽  
Phase Detector ◽  
Modern World ◽  
Voltage Controlled Oscillator ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Analog To Digital ◽  
Low Pass

This article describes the method of converting an analog signal into a digital code using a phase locked loop (PLL) circuit. The functional structure of the voltage-to-digital conversion circuit is considered. The application of the principle of phase-locked loop for controlling the duty cycle of the output signal of a phase detector when the voltage at the positive input of the operational amplifier included in the low-pass filter is investigated. In the modern world, analog-to-digital converters (ADCs) are available in almost every electronic device. The application of different ADC architectures is determined by their parameters and features by circuit and technological implementation. The phase-locked loop with a digital part (16-bit counter, storage register and data transfer interface) allows to obtain a precision analog-to-digital converter, based on a relatively simple circuit design, which has high accuracy and low noise level. Negative feedback of the PLL loop makes it possible to level the error of the passive elements of the low-pass filter (LPF) and the voltage controlled oscillator (VCO). The result of this work is an analysis of the ADC characteristics in the technological basis of 250 nm.

scholarly journals Demodulation of Angular Position and Velocity from Resolver Signals via Chebyshev Filter-Based Type III Phase Locked Loop

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 354 ◽  
Author(s):  
Huan Liu ◽  
Zhong Wu
Keyword(s):  
Angular Position ◽  
Frequency Measurement ◽  
Phase Locked Loop ◽  
Estimation Accuracy ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Type Iii ◽  
Low Pass ◽  
Chebyshev Filter ◽  
Demodulation Method

A high-accuracy demodulation algorithm is required to estimate angular position and angular velocity from resolver signals. In order to improve the estimation accuracy of conventional phase-locked loop (PLL) based demodulation method, a Chebyshev filter-based type III PLL method is proposed in this paper. The proposed method makes PLL become a system of type III tracking loop, which could greatly reduce the theoretical constant deviation in the estimation results of conventional type II PLL in case of variable speed. Meanwhile, the eigenvalues of type III PLL are placed to be the same position as those of a Chebyshev low-pass filter. In this way, demodulation parameters with stronger filter properties can be obtained to effectively suppress the high-frequency measurement noise in resolver signals. Thus, the proposed method can achieve higher demodulation precision compared with the conventional ones. Simulations and experiments are performed to validate the proposed demodulation method.

scholarly journals Variable-Frequency Grid-Sequence Detector Based on a Quasi-Ideal Low-Pass Filter Stage and a Phase-Locked Loop

2010 ◽  
Vol 25 (10) ◽  
pp. 2552-2563 ◽  
Author(s):  
Eider Robles ◽  
Salvador Ceballos ◽  
Josep Pou ◽  
José Luis Martín ◽  
Jordi Zaragoza ◽  
...  
Keyword(s):  
Phase Locked Loop ◽  
Variable Frequency ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Frequency Grid

A 10 GHz Phase-Locked Loop With a Compact Low-Pass Filter in 0.18 $\mu$m CMOS

2009 ◽  
Vol 19 (10) ◽  
pp. 659-661 ◽  
Author(s):  
Sin-Jhih Li ◽  
Hsieh-Hung Hsieh ◽  
Liang-Hung Lu
Keyword(s):  
Phase Locked Loop ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass

Based on Phase-Locked Loop the ADF4350 Filter Design

2014 ◽  
Vol 631-632 ◽  
pp. 301-305 ◽  
Author(s):  
Bai Shan Zhao ◽  
Ye Xu ◽  
Jin Shuai Qu
Keyword(s):  
Filter Design ◽  
Structural Characteristics ◽  
Circuit Simulation ◽  
Phase Locked Loop ◽  
Actual Situation ◽  
Loop Filter ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Filter Structure ◽  
Low Pass

Based on the basic principle of the phase locked loop, analyzes the structural characteristics of the loop filter technology and ADF4350; secondly, design and analysis of two order passive low pass filter, three order passive low pass filter, two order active low-pass filter, with parameters such as bandwidth, phase margin ADF4350 PLL, selection the loop filter is suitable for the actual situation; using ADIsimPLL software to determine the parameters and realize the optimization of S parameters on circuit simulation, optimized and then use ADS software to observe. Finally, according to the results of analysis to adapt to the situation three kinds of filter structure of ADF4350phase locked loop.

scholarly journals Tan-Sun Transformation-Based Phase-Locked Loop in Detection of the Grid Synchronous Signals under Distorted Grid Conditions

Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 674
Author(s):  
Guangjun Tan ◽  
Chunan Zong ◽  
Xiaofeng Sun
Keyword(s):  
Response Speed ◽  
Phase Locked Loop ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Estimated Parameters ◽  
Distorted Grid ◽  
Three Phase ◽  
Low Pass ◽  
Clarke Transformation ◽  
System Order

When three-phase voltages are polluted with unbalance, DC offsets, or higher harmonics, it is a challenge to quickly detect their parameters such as phases, frequency, and amplitudes. This paper proposes a phase-locked loop (PLL) for the three-phase non-ideal voltages based on the decoupling network composed of two submodules. One submodule is used to detect the parameters of the fundamental and direct-current voltages based on Tan-Sun transformation, and the other is used to detect the parameters of the higher-harmonic voltages based on Clarke transformation. By selecting the proper decoupling vector by mapping Hilbert space to Euclidean space, the decoupling control for each estimated parameter can be realized. The settling time of the control law can be set the same for each estimated parameter to further improve the response speed of the whole PLL system. The system order equals the number of the estimated parameters in each submodule except that a low-pass filter is required to estimate the average amplitude of the fundamental voltages, so the whole PLL structure is very simple. The simulation and experimental results are provided in the end to validate the effectiveness of the proposed PLL technique in terms of the steady and transient performance.

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