scholarly journals Demodulation of Angular Position and Velocity from Resolver Signals via Chebyshev Filter-Based Type III Phase Locked Loop

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 354 ◽  
Author(s):  
Huan Liu ◽  
Zhong Wu

A high-accuracy demodulation algorithm is required to estimate angular position and angular velocity from resolver signals. In order to improve the estimation accuracy of conventional phase-locked loop (PLL) based demodulation method, a Chebyshev filter-based type III PLL method is proposed in this paper. The proposed method makes PLL become a system of type III tracking loop, which could greatly reduce the theoretical constant deviation in the estimation results of conventional type II PLL in case of variable speed. Meanwhile, the eigenvalues of type III PLL are placed to be the same position as those of a Chebyshev low-pass filter. In this way, demodulation parameters with stronger filter properties can be obtained to effectively suppress the high-frequency measurement noise in resolver signals. Thus, the proposed method can achieve higher demodulation precision compared with the conventional ones. Simulations and experiments are performed to validate the proposed demodulation method.

2018 ◽  
pp. 6-12 ◽  
Author(s):  
R. V. Magerramov

This article describes the method of converting an analog signal into a digital code using a phase locked loop (PLL) circuit. The functional structure of the voltage-to-digital conversion circuit is considered. The application of the principle of phase-locked loop for controlling the duty cycle of the output signal of a phase detector when the voltage at the positive input of the operational amplifier included in the low-pass filter is investigated. In the modern world, analog-to-digital converters (ADCs) are available in almost every electronic device. The application of different ADC architectures is determined by their parameters and features by circuit and technological implementation. The phase-locked loop with a digital part (16-bit counter, storage register and data transfer interface) allows to obtain a precision analog-to-digital converter, based on a relatively simple circuit design, which has high accuracy and low noise level. Negative feedback of the PLL loop makes it possible to level the error of the passive elements of the low-pass filter (LPF) and the voltage controlled oscillator (VCO). The result of this work is an analysis of the ADC characteristics in the technological basis of 250 nm.


2011 ◽  
Vol 7 (1) ◽  
pp. 5-8
Author(s):  
Hisham Swady

Analog filters constitute indispensible component of analog circuits and still playing an important part in interface with analog real world. realizing filters with odd order is preferred because of its time response . Therefore, this paper is conducted to introduce a new generalized Chebyshev – like approximation for analog filters. The analyses presented to realize the filters with odd order. This proposed novel approach offer good results in terms of flat delay and time domain response. Also, the achieved results are validated by comparison to normal Chebyshev filter via investigation several examples.


2010 ◽  
Vol 25 (10) ◽  
pp. 2552-2563 ◽  
Author(s):  
Eider Robles ◽  
Salvador Ceballos ◽  
Josep Pou ◽  
José Luis Martín ◽  
Jordi Zaragoza ◽  
...  

2009 ◽  
Vol 19 (10) ◽  
pp. 659-661 ◽  
Author(s):  
Sin-Jhih Li ◽  
Hsieh-Hung Hsieh ◽  
Liang-Hung Lu

2014 ◽  
Vol 631-632 ◽  
pp. 301-305 ◽  
Author(s):  
Bai Shan Zhao ◽  
Ye Xu ◽  
Jin Shuai Qu

Based on the basic principle of the phase locked loop, analyzes the structural characteristics of the loop filter technology and ADF4350; secondly, design and analysis of two order passive low pass filter, three order passive low pass filter, two order active low-pass filter, with parameters such as bandwidth, phase margin ADF4350 PLL, selection the loop filter is suitable for the actual situation; using ADIsimPLL software to determine the parameters and realize the optimization of S parameters on circuit simulation, optimized and then use ADS software to observe. Finally, according to the results of analysis to adapt to the situation three kinds of filter structure of ADF4350phase locked loop.


Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 674
Author(s):  
Guangjun Tan ◽  
Chunan Zong ◽  
Xiaofeng Sun

When three-phase voltages are polluted with unbalance, DC offsets, or higher harmonics, it is a challenge to quickly detect their parameters such as phases, frequency, and amplitudes. This paper proposes a phase-locked loop (PLL) for the three-phase non-ideal voltages based on the decoupling network composed of two submodules. One submodule is used to detect the parameters of the fundamental and direct-current voltages based on Tan-Sun transformation, and the other is used to detect the parameters of the higher-harmonic voltages based on Clarke transformation. By selecting the proper decoupling vector by mapping Hilbert space to Euclidean space, the decoupling control for each estimated parameter can be realized. The settling time of the control law can be set the same for each estimated parameter to further improve the response speed of the whole PLL system. The system order equals the number of the estimated parameters in each submodule except that a low-pass filter is required to estimate the average amplitude of the fundamental voltages, so the whole PLL structure is very simple. The simulation and experimental results are provided in the end to validate the effectiveness of the proposed PLL technique in terms of the steady and transient performance.


2012 ◽  
Vol 433-440 ◽  
pp. 6565-6571
Author(s):  
Xiao Cui Lei ◽  
Guang Zeng ◽  
Jing Gang Zhang

Three-phase circuit instantaneous reactive power theory has received a successful application in detecting harmonic and reactive current timely, the ip-iq and d-q method of first proposed require the phase-locked loop and low-pass filter. The paper make corresponding improvement on the basis of the method based on amplitude integration which only can detect fundamental current , propose a method which can detect the active and reactive current, and the method based on amplitude integration can detect fundamental current of single-phase circuit directly, and simulation. The simulation results show that the method can detect the harmonic and reactive current accurately and timely, and is suitable for various circumstances that three-phase power supply distortion and asymmetry and so on, and when only detecting the harmonic current, it does not require the phase-locked loop and low-pass filter, while detecting the harmonic and reactive current, increases the phase-locked loop; when the method based on amplitude integration is directly used to detect single-phase fundamental current, the phase-locked loop and low-pass filter are not required. The paper deduces the theory of the method and researches on simulation analysis.


2013 ◽  
Vol 313-314 ◽  
pp. 1274-1278
Author(s):  
F. Yusivar ◽  
Y. Syaifuddin ◽  
A.N. Rahman

Digital Phase Locked Loop (PLL) is an algorithm that is used to detect the phase, frequency, and amplitude of a signal. The output of digital PLL algorithm can be used as synchronization reference for grid connected inverter. A digital PLL algorithm is very popular to be used since its structure is very simple and it has high accuracy. However, the output of digital PLL is not stable if the input reference frequency is shifted from the pre-defined fundamental frequency and that condition will result an oscillation in digital PLL output. In this paper, an algorithm modification is employed using low pass filter and all pass filter to improve the digital PLL output response under various condition. All simulation results will be shown and compared to the conventional algorithm.


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