scholarly journals New Optimal Common-Mode Modulation for Three-Phase Inverters with DC-Link Referenced Output Filter

2017 ◽  
Vol 2 (4) ◽  
pp. 331-340 ◽  
Author(s):  
Michael Antivachis
2019 ◽  
Vol 139 (3) ◽  
pp. 339-347 ◽  
Author(s):  
Shotaro Takahashi ◽  
Satoshi Ogasawara ◽  
Masatsugu Takemoto ◽  
Koji Orikawa ◽  
Michio Tamate

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1381
Author(s):  
Wojciech Kołodziejski ◽  
Stanisław Kuta ◽  
Jacek Jasielski

This paper presents new architectures and implementations of original open-loop Class-BD audio amplifiers with balanced Common-Mode output. The output stage of each proposed amplifier includes the typical H-bridge with four MOSFETs and four additional MOSFET switches that balance and keep the Common-Mode output constant. The presented amplifiers employ the extended NBDD PWM or PSC PWM modulation scheme. When the output stage is built only on NMOSFET transistors, gate drivers require a floating power supply, using a self-boost charge pump with capacitive isolation of the control signal. The use of complementary MOSFETs in the output stage greatly simplifies gate control systems. The proposed amplifiers were compared to the typical Class-BD configuration, using the optimal NBDD modulation with respect to audio performance of the Differential-Mode (DM) and Common-Mode (CM) outputs. Basic SPICE simulations and experimental studies have shown that the proposed Class-BD amplifiers have similar audio performance to the prototype with the optimal NBDD modulation scheme, while at the same time having a balanced constant voltage CM output, thus eliminating the main contributor to radiation emission. As a result, the filtering of the DM output signals can be greatly simplified, while the filtering of the CM output signals can be theoretically eliminated. Practically, due to the timing errors added by the gate drivers, spikes are generated at the CM output, which are very easy to filter out by the reduced LC output filter, even at very low L.


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.


Sign in / Sign up

Export Citation Format

Share Document