Bulk linearized CMOS differential pair transconductor for continuous-time OTA-C filter design

2014 ◽  
Vol 62 (1) ◽  
pp. 77-84 ◽  
Author(s):  
B. Pankiewicz ◽  
S. Szczepański ◽  
M. Wójcikowski
Keyword(s):  
Transfer Function ◽  
Analytical Solution ◽  
Input Signal ◽  
Continuous Time ◽  
Low Voltage ◽  
Filter Design ◽  
Current Transfer ◽  
Operational Transconductance Amplifier ◽  
Transconductance Amplifier ◽  
Differential Pair

Abstract In this paper, the MOS differential pair driven simultaneously from gates and bulk terminals is described. An approximated analytical solution of the voltage to current transfer function has been found for the proposed circuit. Four possible combinations of gate and bulk connections of the input signal are presented. Basing on the configuration giving the best linearity, the operational transconductance amplifier (OTA) has been designed and compared, by computer simulations, to the amplifier utilizing the gate driven classic MOS pair. 3rd order filters using the OTAs with linearized and simple MOS pair have been designed and the resulting parameters have been compared. Linearization through the presented simultaneous use of gate and bulk terminals seems to be useful for low voltage applications.

Low Power Operational Transconductance Amplifier (OTA) with Enhanced DC Gain and Slew-Rate

2013 ◽  
Vol 411-414 ◽  
pp. 1645-1648
Author(s):  
Xiao Zong Huang ◽  
Lun Cai Liu ◽  
Jian Gang Shi ◽  
Wen Gang Huang ◽  
Fan Liu ◽  
...  
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
Optimization Techniques ◽  
Current Mirror ◽  
Slew Rate ◽  
Operational Transconductance Amplifier ◽  
Theory Analysis ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Simulation Results

This paper presents a low-voltage differential operational transconductance amplifier (OTA) with enhanced DC gain and slew-rate. Based on the current mirror OTA topology, the optimization techniques are discussed in this work. The proposed structure achieves enhanced DC gain, unit gain frequency (UGF) and slew-rate (SR) with adding four devices. The design of the OTA is described with theory analysis. The OTA operates at the power supply of 1.8V. Simulation results for 0.18μm standard CMOS technology show that the DC gain increases from 60.6dB to 65dB, the UGF is optimized from 2.5MHz to 4.3MHz, the SR is enhanced from 0.88 V/μs to 4.8 V/μs with close power consumption dramatically.

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