Timing Problems Due to Spacer Bridging in a Sub-100 nm Product
Keyword(s):
Abstract In this paper, a comprehensive study to find a memory related yield loss in 90 nm technology will be discussed. The loss was related to spacer bridging, blocking silicide formation and Lightly Doped Drain (LDD), source/drain implant. Soft Defect Localization (SDL) techniques [1], sub-micron Atomic Force Microscope (AFM) probing [2] and Time Resolved Emission (TRE) measurements were necessary to obtain an accurate understanding of the problem and the mechanism. Electrical results were compared to simulations. Modified test structures were implemented to monitor the process stability with respect to bridging failures.
2001 ◽
Vol 202
(2)
◽
pp. 395-400
◽
1992 ◽
Vol 50
(2)
◽
pp. 1146-1147
1989 ◽
Vol 47
◽
pp. 32-33
1993 ◽
Vol 51
◽
pp. 704-705
2004 ◽
Vol 28
(3)
◽
pp. 301-304
◽
2015 ◽
Vol 6
(3)
◽
pp. 179-191
Keyword(s):
Keyword(s):