scholarly journals Modeling of Gate Tunable Synaptic Device for Neuromorphic Applications

2021 ◽  
Vol 9 ◽  
Author(s):  
Yang Shen ◽  
He Tian ◽  
Yanming Liu ◽  
Fan Wu ◽  
Zhaoyi Yan ◽  
...  
Keyword(s):  
Stochastic Simulation ◽  
Cell Structure ◽  
Random Access ◽  
Simulation Method ◽  
Resistive Random Access Memory ◽  
Growth Speed ◽  
Neuromorphic Computing ◽  
Resistive Layer ◽  
Back Gate ◽  
Von Neumann

The emerging memories are great candidates to establish neuromorphic computing challenging non-Von Neumann architecture. Emerging non-volatile resistive random-access memory (RRAM) attracted abundant attention recently for its low power consumption and high storage density. Up to now, research regarding the tunability of the On/Off ratio and the switching window of RRAM devices remains scarce. In this work, the underlying mechanisms related to gate tunable RRAMs are investigated. The principle of such a device consists of controlling the filament evolution in the resistive layer using graphene and an electric field. A physics-based stochastic simulation was employed to reveal the mechanisms that link the filament size and the growth speed to the back-gate bias. The simulations demonstrate the influence of the negative gate voltage on the device current which in turn leads to better characteristics for neuromorphic computing applications. Moreover, a high accuracy (94.7%) neural network for handwritten character digit classification has been realized using the 1-transistor 1-memristor (1T1R) crossbar cell structure and our stochastic simulation method, which demonstrate the optimization of gate tunable synaptic device.

Reliable analog resistive switching behaviors achieved using memristive devices in AlOx/HfOx bilayer structure for neuromorphic systems

2021 ◽  
Author(s):  
Meng Qi ◽  
Tianquan Fu ◽  
Huadong Yang ◽  
ye tao ◽  
Chunran Li ◽  
...  
Keyword(s):  
Resistive Switching ◽  
Learning Experience ◽  
Random Access ◽  
Resistive Random Access Memory ◽  
Spike Timing ◽  
Information Storage ◽  
Bilayer Structure ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Simulation Based

Abstract Human brain synaptic memory simulation based on resistive random access memory (RRAM) has an enormous potential to replace traditional Von Neumann digital computer thanks to several advantages, including its simple structure, high-density integration, and the capability to information storage and neuromorphic computing. Herein, the reliable resistive switching (RS) behaviors of RRAM are demonstrated by engineering AlOx/HfOx bilayer structure. This allows for uniform multibit information storage. Further, the analog switching behaviors are capable of imitate several synaptic learning functions, including learning experience behaviors, short-term plasticity-long-term plasticity transition, and spike-timing-dependent-plasticity (STDP). In addition, the memristor based on STDP learning rules are implemented in image pattern recognition. These results may offer a promising potential of HfOx-based memristors for future information storage and neuromorphic computing applications.

Role of Anode on Resistance Switching Phenomenon of Metal Oxide Resistive Random Access Memory

2015 ◽  
Vol 1805 ◽  
Author(s):  
Kentaro Kinoshita ◽  
Sang-Gyu Koh ◽  
Takumi Moriyama ◽  
Satoru Kishida
Keyword(s):  
Metal Oxide ◽  
Cell Structure ◽  
Random Access ◽  
Theoretical Models ◽  
Resistive Random Access Memory ◽  
Electrode Structure ◽  
Switching Phenomenon ◽  
Afm Cantilever ◽  
Electrode Metal

ABSTRACTAlthough the presence of oxygen reservoir is assumed in many theoretical models which explain resistive switching of ReRAM with an electrode/metal oxide (MO)/electrode structure, the location of oxygen reservoir is not clear. We have previously reported a method for preparing an extremely small ReRAM cell which has removable bottom electrode (BE), by using AFM cantilever. In this study, we used this cell structure to specify the location of oxygen reservoir. Since an anode is assumed to work as an oxygen reservoir in most models, we investigated the effect of changing anodes for the same filament on the presence or absence of the occurrence of reset switching. It was revealed that reset occurred independently of catalytic ability and Gibbs free energy (ΔG) of anode material. However, reset was caused by repairing oxygen vacancies of which filament consists when metals with high ΔG is used as an anode, whereas by oxidizing an anode when metals with low ΔG is used as an anode. This result suggests that the MO film works as an oxygen reservoir for anode with high ΔG, whereas an anode works as an oxygen reservoir for anode with low ΔG.

scholarly journals All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Maheswari Sivan ◽  
Yida Li ◽  
Hasita Veluri ◽  
Yunshan Zhao ◽  
Baoshan Tang ◽  
...  
Keyword(s):  
Low Temperature ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
Material System ◽  
Access Memory ◽  
Von Neumann ◽  
Memory Integration ◽  
Processed Material

Abstract3D monolithic integration of logic and memory has been the most sought after solution to surpass the Von Neumann bottleneck, for which a low-temperature processed material system becomes inevitable. Two-dimensional materials, with their excellent electrical properties and low thermal budget are potential candidates. Here, we demonstrate a low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe2p-FET, with a solution-processed WSe2 Resistive Random Access Memory. The employed plasma oxidation technique results in a low Schottky barrier height of 25 meV with a mobility of 230 cm2 V−1 s−1, leading to a 100x performance enhanced WSe2p-FET, while the defective WSe2 Resistive Random Access Memory exhibits a switching energy of 2.6 pJ per bit. Furthermore, guided by our device-circuit modelling, we propose vertically stacked channel FETs for high-density sub-0.01 μm2 memory cells, offering a new beyond-Si solution to enable 3-D embedded memories for future computing systems.

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