scholarly journals Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1373
Author(s):  
Pablo González-Vizuete ◽  
Joaquín Bernal-Méndez ◽  
María A. Martín-Prats

In this work, we analyze the impact of output filter design techniques aimed to reduce conducted emissions at the output of a DCDC power converter. A thorough analysis, based on high-frequency circuit models of the converter, is performed to assess expected improvements offered by different design strategies. This analysis is then confronted with measurements of conducted emissions at the output of a 300 W 48 V to 12 V Phase Shift Full Bridge (PSFB) prototype. Those experimental results demonstrate that a symmetric arrangement of the output LC filter and a direct bonding of the return output terminal of the converter to chassis are effective to reduce common mode conducted emissions at the output. Those results also demonstrate that the symmetry of the output LC filter can reduce conducted emissions in differential mode at high frequencies, where common mode to differential mode conversion is the predominant contribution to differential mode noise. However, direct bonding to chassis of the return output terminal may be ineffective at high frequencies due to the parasitic inductance associated with this connection. Main conclusions drawn for this analysis are applicable in general for isolated converters with a high voltage step between high and low voltage sides. Since the techniques of reduction of conducted emissions studied here do not increase the number of filter components, they are especially suitable for applications where high power density is an important requirement, e.g., aerospace or automotive applications.


Electronics ◽  
2020 ◽  
Vol 9 (3) ◽  
pp. 381 ◽  
Author(s):  
Pablo González-Vizuete ◽  
Carlos Domínguez-Palacios ◽  
Joaquín Bernal-Méndez ◽  
María A. Martín-Prats

This work presents a technique to measure the attenuation of differential mode noise provided by common mode chokes. The proposed setup is a simpler alternative to the balanced setup commonly employed to that end, and its main advantage is that it avoids the use of auxiliary circuits (baluns). We make use of a modal analysis of a high-frequency circuit model of the common mode choke to identify the natural modes actually excited both in the standard balanced setup and in the simpler alternative setup proposed here. This analysis demonstrates that both setups are equivalent at low frequencies and makes it possible to identify the key differences between them at high frequencies. To analyze the scope and interest of the proposed measurement technique we have measured several commercial common mode chokes and we have thoroughly studied the sensitivity of the measurements taken with the proposed setup to electric and magnetic couplings. We have found that the proposed setup can be useful for quick assessment of the attenuation provided by a common mode choke for differential mode noise in a frequency range that encompasses the frequencies where most electromagnetic compatibility regulations impose limits to the conducted emissions of electronic equipment.



Energies ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 972 ◽  
Author(s):  
Fermín Barrero-González ◽  
Victor Pires ◽  
José Sousa ◽  
João Martins ◽  
María Milanés-Montero ◽  
...  

The proliferation of residential photovoltaic (PV) prosumers leads to detrimental impacts on the low-voltage (LV) distribution network operation such as reverse power flow, voltage fluctuations and voltage imbalances. This is due to the fact that the strategies for the PV inverters are usually designed to obtain the maximum energy from the panels. The most recent approach to these issues involves new inverter-based solutions. This paper proposes a novel comprehensive control strategy for the power electronic converters associated with PV installations to improve the operational performance of a four-wire LV distribution network. The objectives are to try to balance the currents demanded by consumers and to compensate the reactive power demanded by them at the expense of the remaining converters’ capacity. The strategy is implemented in each consumer installation, constituting a decentralized or distributed control and allowing its practical implementation based on local measurements. The algorithms were tested, in a yearly simulation horizon, on a typical Portuguese LV network to verify the impact of the high integration of the renewable energy sources in the network and the effectiveness and applicability of the proposed approach.



Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 917
Author(s):  
Jean-Christophe CREBIER ◽  
Theo LAMORELLE ◽  
Silvain MARACHE ◽  
Thanh Hai PHUNG ◽  
Van-Sang NGUYEN ◽  
...  

The paper deals with arrays of numerous power conversion cells, associated in series and/or in parallel to build larger step up or step down direct current (DC)/DC isolated converters. The work focuses on the impact of the spread and distribution of the conversion cell characteristics on the characteristics and performance of the power converter array (PCA). Based on a characterization protocol, about 130 conversion standard cells (CSC) are characterized and classified from a statistical point of view. Three families are defined and representatives are chosen and implemented in various configurations, in open and closed loop control, to analyze the impact of their spread characteristic over the global converter, the PCA. The paper is based on an extended practical set up and protocols, all described in details. Guidelines on CSCs implementation with respect to their dispersion are provided at the end on the paper.



Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 413 ◽  
Author(s):  
Haoqi Zhu ◽  
Dongliang Liu ◽  
Xu Zhang ◽  
Feng Qu

The switching device in a power converter can produce very serious electromagnetic interference (EMI). In order to solve this problem and the associated reliability and stability issues, this article aimed to analyze and model the boost power factor correction (PFC) converter according to the EMI conduction path. The sources of common-mode (CM) and differential-mode (DM) noise of the boost PFC converter were analyzed, and the DM and CM equivalent circuits were deduced. Furthermore, high-frequency modeling of the common-mode inductor was developed using a precise model, and the EMI filter was designed. According to the Class B standard for EMI testing, it is better to restrain the EMI noise in the frequency range (150 kHz to 30 MHz) of the EMI conducted disturbance test. Using this method, a 2.4-kW PFC motor driving supply was designed, and the experimental results validate the analysis.



Author(s):  
Phanumas Khumsat ◽  
Apisak Worapishet ◽  
Klanarong Noulkaew ◽  
Theerachet Soorapanth


2020 ◽  
Author(s):  
Phanumas Khumsat

<div>This work develops a low-power and low-voltage differential Gm-C filter structure that effectively achieves selfcommon-mode control (SCC), including DC stabilization and common-mode (CM) rejection, without employing extra control circuitry. The structure relies upon an incorporation of voltageinverting amplifiers to make it inherently contain no CM positive feedback loops for DC stabilization, and to enable splitting of the core transconductors into pairs for CM signal rejection. A DC CM stability analysis reveals that stabilization of the SCC structure can be reached without any dedicated CM control circuitry. An analytical comparison on power consumption of a high-order lowpass Gm-C filter implemented using an inverter-based</div><div>transconductor for the SCC structure and the same transconductor with a CM control network (the Nauta’s technique) for the conventional structure indicates theoretical</div><div>overhead power saving by over 50%. Furthermore, an even</div><div>higher overhead power saving at over 70Ên be achieved in the complex SCC Gm-C filter because no additional inverting</div><div>amplifiers are required to eliminate CM positive feedback loops in the crossing transconductors for complexification. The impact of the inverting amplifiers on the noise and frequency characteristics as well as the compensation technique are outlined to enable design optimization. The SCC filter was verified via extensive simulations of a 5th-order 1.1-MHz elliptic complex filter in a 0.18-m CMOS process. As compared to the conventional filter counterpart with similar SNR (~63dB) and inband/out-of-band SFDRs (~52dB/56dB), the proposed structure yields an overhead power saving by 70% with an improved figure-of-merit over 40% under a 1-V supply.</div>



2020 ◽  
Author(s):  
Phanumas Khumsat

<div>This work develops a low-power and low-voltage differential Gm-C filter structure that effectively achieves selfcommon-mode control (SCC), including DC stabilization and common-mode (CM) rejection, without employing extra control circuitry. The structure relies upon an incorporation of voltageinverting amplifiers to make it inherently contain no CM positive feedback loops for DC stabilization, and to enable splitting of the core transconductors into pairs for CM signal rejection. A DC CM stability analysis reveals that stabilization of the SCC structure can be reached without any dedicated CM control circuitry. An analytical comparison on power consumption of a high-order lowpass Gm-C filter implemented using an inverter-based</div><div>transconductor for the SCC structure and the same transconductor with a CM control network (the Nauta’s technique) for the conventional structure indicates theoretical</div><div>overhead power saving by over 50%. Furthermore, an even</div><div>higher overhead power saving at over 70Ên be achieved in the complex SCC Gm-C filter because no additional inverting</div><div>amplifiers are required to eliminate CM positive feedback loops in the crossing transconductors for complexification. The impact of the inverting amplifiers on the noise and frequency characteristics as well as the compensation technique are outlined to enable design optimization. The SCC filter was verified via extensive simulations of a 5th-order 1.1-MHz elliptic complex filter in a 0.18-m CMOS process. As compared to the conventional filter counterpart with similar SNR (~63dB) and inband/out-of-band SFDRs (~52dB/56dB), the proposed structure yields an overhead power saving by 70% with an improved figure-of-merit over 40% under a 1-V supply.</div>



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