scholarly journals An Interleaved Phase-Shift Full-Bridge Converter with Dynamic Dead Time Control for Server Power Applications

Energies ◽  
2021 ◽  
Vol 14 (4) ◽  
pp. 853
Author(s):  
Jia-You Lee ◽  
Jheng-Hung Chen ◽  
Kuo-Yuan Lo

A compact and high-efficiency power converter is the main business of today’s power industry for server power applications. To achieve high efficiency with a low-output ripple, an interleaved phase-shift full-bridge (PSFB) converter is designed, built, and tested for server power applications in this study. In this paper, dynamic dead time control is proposed to reduce the switching loss in the light load condition. The proposed technique reduces the turn-off switching loss and allows a wide range of zero-voltage switching. Moreover, the current ripple of the output inductor can be reduced with the interleaved operation. To verify the theoretical analysis, the proposed PSFB converter is simulated, and a 3 kW prototype is constructed. The experimental results confirm that the conversion efficiency is as high as 97.2% at the rated power of 3 kW and 92.95% at the light load of 300 W. The experimental transient waveforms demonstrated that the voltage spike or drop is less than 2 V in the fast-fluctuating load conditions from 0% load to 60% load and 40% load to 100% load.

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1623
Author(s):  
Jun-Mo Kim ◽  
Jeong Lee ◽  
Kyung Ryu ◽  
Chung-Yuen Won

In this paper, a switching method is proposed for power device temperature-balancing in a phase-shift full-bridge (PSFB) converter. PSFB is commonly used for applications that require high efficiency, because a zero-voltage switching (ZVS) operation is possible on the primary-side. In PSFB, the circulation current complicates ZVS under a light-load condition, which generates heat. Meanwhile, the heat generated in PSFB creates a temperature deviation between the lagging leg and the leading leg, which shortens the lifetime of the power device, thereby reducing system reliability and efficiency. To solve this problem, previous studies applied a pulse-width modulation (PWM) switching method for light and medium loads, and a phase-shift switching method for the region where ZVS is possible. Although this method has the advantage of easy control, the maximum temperature of the legs of the PSFB increases with medium loads. In this paper, a temperature-balancing algorithm—a temperature-balance control—is proposed to decrease the leg temperature using switching based on position exchanges of the leading leg and lagging leg along with PWM switching. Temperature-balance control minimizes leg temperature deviation under light load conditions. The proposed control method provides a minimum temperature difference between the two legs and high efficiency.


Energies ◽  
2020 ◽  
Vol 13 (11) ◽  
pp. 2836
Author(s):  
Nuraina Syahira Mohd Sharifuddin ◽  
Nadia M. L. Tan ◽  
Hirofumi Akagi

This paper presents the performance of a three-phase bidirectional isolated DC-DC converter (3P-BIDC) in wye-wye (Yy), wye-delta (Yd), delta-wye (Dy), and delta-delta (Dd) transformer configurations, using enhanced switching strategy that combines phase-shift modulation and burst-mode switching. A simulation verification using PSCAD is carried out to study the feasibility and compare the efficiency performance of the 3P-BIDC with each transformer configuration, using intermittent switching, which combines the conventional phase-shift modulation (PSM) and burst-mode switching, in the light load condition. The model is tested with continuous switching that employs the conventional PSM from medium to high loads (greater than 0.3 p.u.) and with intermittent switching at light load (less than 0.3 p.u), in different transformer configurations. In all tests, the DC-link voltages are equal to the transformer turns ratio of 1:1. This paper also presents the power loss estimation in continuous and intermittent switching to verify the modelled losses in the 3P-BIDC in the Yy transformer configuration. The 3P-BIDC is modelled by taking into account the effects that on-state voltage drop in the insulated-gate bipolar transistor (IGBTs) and diodes, snubber capacitors, and three-phase transformer copper winding resistances will have on the conduction and switching losses, and copper losses in the 3P-BIDC. The intermitting switching improves the efficiency of the DC-DC converter with Yy, Yd, Dy, and Dd connections in light-load operation. The 3P-BIDC has the best efficiency performance using Yy and Dd transformer configurations for all power transfer conditions in continuous and intermittent switching. Moreover, the highest efficiency of 99.6% is achieved at the light power transfer of 0.29 p.u. in Yy and Dd transformer configurations. However, the theoretical current stress in the 3P-BIDC with a Dd transformer configuration is high. Operation of the converter with Dy transformer configuration is less favorable due to the efficiency achievements of lower than 95%, despite burst-mode switching being applied.


2013 ◽  
Vol 2013 ◽  
pp. 1-11
Author(s):  
Cheng-Tao Tsai ◽  
Jye-Chau Su ◽  
Sheng-Yu Tseng

This paper presents comparison between phase-shift full-bridge converters with noncoupled and coupled current-doubler rectifier. In high current capability and high step-down voltage conversion, a phase-shift full-bridge converter with a conventional current-doubler rectifier has the common limitations of extremely low duty ratio and high component stresses. To overcome these limitations, a phase-shift full-bridge converter with a noncoupled current-doubler rectifier (NCDR) or a coupled current-doubler rectifier (CCDR) is, respectively, proposed and implemented. In this study, performance analysis and efficiency obtained from a 500 W phase-shift full-bridge converter with two improved current-doubler rectifiers are presented and compared. From their prototypes, experimental results have verified that the phase-shift full-bridge converter with NCDR has optimal duty ratio, lower component stresses, and output current ripple. In component count and efficiency comparison, CCDR has fewer components and higher efficiency at full load condition. For small size and high efficiency requirements, CCDR is relatively suitable for high step-down voltage and high efficiency applications.


2016 ◽  
Vol 25 (11) ◽  
pp. 1650136 ◽  
Author(s):  
Zhaohan Li ◽  
Yongcheng Ji ◽  
Shu Yang ◽  
Yuchun Chang

This paper proposes a high-voltage high-efficiency peak-current-mode asynchronous DC–DC step-down converter operating with dual operation modes. The asynchronous buck converter achieves higher efficiency in light load condition compared to synchronous buck converters. Furthermore, the proposed buck converter switches operation mode automatically from pulse-width modulation (PWM) mode to pulse-skipping mode (PSM). By reducing power MOS on-state resistance and optimizing rise/fall time of switches, the proposed buck converter also obtains high efficiency under heavy load condition. The maximum efficiency of the proposed buck converter is 92.9%, implemented with 0.35[Formula: see text][Formula: see text]m BCDMOS 2P3M process, and the total size is 1.1[Formula: see text] 1.2[Formula: see text]mm2. The input range and output range of the converter are 6–30 V, and ([Formula: see text]–3) V, respectively, with the maximum output current of 3 A. Moreover, its built-in current loop leads to good transient response characteristics. Therefore, it can be used widely in communication system and 12 V/24 V distributed power system.


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