Capacitance-Voltage Characteristics of Solution-Based HfZr-Silicate Gate Dielectrics

Author(s):  
Nara Lee ◽  
Pyungho Choi ◽  
Byoungdeog Choi
2002 ◽  
Vol 747 ◽  
Author(s):  
Takanori Kiguchi ◽  
Naoki Wakiya ◽  
Kazuo Shinozaki ◽  
Nobuyasu Mzutani

ABSTRACTThe effects of several rare earth oxide on the capacitance-voltage (C-V) characteristics and the SiO2 interlayer growth of ZrO2 based gate dielectrics were examined. The width of the hysteresis window of La2O3 stabilized ZrO2 (LaSZ) gate dielectric was only 0.2V, on the other hands, that of Sc2O3 stabilized ZrO2 (ScSZ) gate dielectric was 1.4V HRTEM analysis indicated that the growth of SiO2 interlayer of RSZ (R=Sm,Nd,La) gate dielectric was about 1nm, which was less than half of the ScSZ one. These results indicate the advantage of the ZrO2 gate dielectric doped with rare earth oxide composed of larger ionic radius cation.


2002 ◽  
Vol 745 ◽  
Author(s):  
Takanori Kiguchi ◽  
Naoki Wakiya ◽  
Kazuo Shinozaki ◽  
Nobuyasu Mzutani

ABSTRACTThe effects of several rare earth oxide on the capacitance-voltage (C-V) characteristics and the SiO2 interlayer growth of ZrO2 based gate dielectrics were examined. The width of the hysteresis window of La2O3 stabilized ZrO2 (LaSZ) gate dielectric was only 0.2V, on the other hands, that of Sc2O3 stabilized ZrO2 (ScSZ) gate dielectric was 1.4V HRTEM analysis indicated that the growth of SiO2 interlayer of RSZ (R=Sm,Nd,La) gate dielectric was about 1nm, which was less than half of the ScSZ one. These results indicate the advantage of the ZrO2 gate dielectric doped with rare earth oxide composed of larger ionic radius cation.


2007 ◽  
Vol 22 (10) ◽  
pp. 2856-2862 ◽  
Author(s):  
D.H. Triyoso ◽  
Z. Yu ◽  
R. Gregory ◽  
K. Moore ◽  
P. Fejes ◽  
...  

The intent of this work is to investigate thermal stability, microstructure, and electrical properties of thin Hf6Ta2O17 high-k gate dielectrics. X-ray diffraction and transmission electron microscopy analysis reveal that an as-deposited Hf6Ta2O17 film is amorphous with a ∼1-nm interfacial layer. After a 1000 °C anneal, the film is a mixture of orthorhombic-Hf6Ta2O17 and monoclinic HfO2 with a thicker interfacial layer. Uniform Hf and Ta Auger depth profiles are observed for as deposited and annealed films. Secondary ion mass spectrometry (SIMS) analysis shows Hf and Ta profiles are unchanged following the 1000 °C anneal, indicating good thermal stability. There is, however, a clear indication of Si up-diffusion into Hf6Ta2O17, particularly after annealing at 1000 °C. No Hf or Ta is found in the Si substrate. Well-behaved capacitance-voltage curves and low leakage current characteristics were obtained for Mo/ Hf6Ta2O17 capacitors for as-deposited and 1000 °C annealed films. A flatband voltage (Vfb) shift towards negative voltage is observed for the annealed film when compared to the as-deposited film, indicating the presence of more positive charge, or less negative charge. Furthermore, capacitance-voltage stress measurements were performed to study charge trapping behaviors. A smaller Vfb shift is observed for as deposited (<10 mV) versus the 1000 °C annealed (30-40 mV) Hf6Ta2O17, indicating more charge trapping after the high temperature anneal.


2011 ◽  
Vol 88 (4) ◽  
pp. 419-422 ◽  
Author(s):  
S. Schamm-Chardon ◽  
P.E. Coulon ◽  
L. Lamagna ◽  
C. Wiemer ◽  
S. Baldovino ◽  
...  

2006 ◽  
Vol 19 (1) ◽  
pp. 43-49 ◽  
Author(s):  
A. Teramoto ◽  
R. Kuroda ◽  
M. Komura ◽  
K. Watanabe ◽  
S. Sugawa ◽  
...  

2000 ◽  
Vol 622 ◽  
Author(s):  
M. Hong ◽  
H. M. Ng ◽  
J. Kwo ◽  
A. R. Kortan ◽  
J. N. Baillargeon ◽  
...  

ABSTRACTA review is given on insulators (oxides and nitrides) which have been deposited on GaN to form metal-insulator (oxides and nitrides)-semiconductor (MOS or MIS) diodes with a low interfacial density of states (Dit). These insulators include AlN, SiO2, Si3N4, SiO2/Ga2O3, and Ga2O3(Gd2O3). Techniques for depositing these insulators and methods for cleaning GaN surfaces prior to the insulator deposition are discussed. Recent progress on GaN MOSFET's (with SiO2/Ga2O3, and Ga2O3(Gd2O3) as gate dielectrics) and MISFET's (with AlN as a gate dielectric) is also reviewed. When exposed to room air, GaN surface is not as robust as previously thought. Therefore, preparation of a clean GaN surface for deposition of oxides and nitrides is necessary to achieve a low Dit. By heating GaN samples in UHV to clean the surfaces followed by deposition of Ga2O3(Gd2O3) and SiO2, we have achieved a low Dit with negligible hysteretic loops in the capacitance-voltage curves


1985 ◽  
Vol 52 ◽  
Author(s):  
J. Nulman ◽  
J. P. Krusius ◽  
P. Renteln

ABSTRACTThe material and electrical characteristics of silicon dielectric films prepared via Rapid Thermal Processing (RTP) are described. A commercial RTP system with heat provided by tungsten-halogen lamps was used. Silicon dioxide films were grown in pure oxygen and in oxygen with 4% hydrogen chloride ambients. As grown films were either annealed in a nitrogen ambient or nitrided in an ammonia ambient. Film thickness ranges from 4 to 70 nm for RTP times from 0 to 300 s at 1150 C. Current-voltage and capacitance-voltage methods were used for electrical characteristics. Ellipsometry, Auger and TEM were used for material characterization.


1998 ◽  
Vol 532 ◽  
Author(s):  
B. Claflin ◽  
M. Binger ◽  
G. Lucovsky ◽  
H.-Y. Yang

ABSTRACTThe growth of reactively sputtered TiNx and WNx compound metal films on ultra-thin, remote plasma enhanced chemical vapor deposited SiO2 and SiO2/Si3N4 (ON) stack dielectrics is investigated from initial interface formation to bulk film by interrupted growth and on-line Auger electron spectroscopy (AES). Growth of both metals occurs uniformly without a seed layer on both dielectrics. The chemical stability of these metal/dielectric interfaces is studied by sequential on-line rapid thermal annealing treatments up to 850 °C and AES. TiNx reacts with SiO2 above 850 °C but the addition of a Si3N4 dielectric top-layer makes the TiNx/ON interface chemically stable at 850 °C. WNx/SiO2 and WNx/Si3N4 interfaces are both stable below 650 °C. MOS capacitors using TiNx or WNx metal gates and thermal SiO2 gate dielectrics exhibit excellent capacitance-voltage characteristics. The work function for TiNx lies near midgap in Si while for WNx it lies closer to the valence band.


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