Investigation of the Growth and Chemical Stability of Composite Metal Gates on Ultra-thin Gate Dielectrics

1998 ◽  
Vol 532 ◽  
Author(s):  
B. Claflin ◽  
M. Binger ◽  
G. Lucovsky ◽  
H.-Y. Yang

ABSTRACTThe growth of reactively sputtered TiNx and WNx compound metal films on ultra-thin, remote plasma enhanced chemical vapor deposited SiO2 and SiO2/Si3N4 (ON) stack dielectrics is investigated from initial interface formation to bulk film by interrupted growth and on-line Auger electron spectroscopy (AES). Growth of both metals occurs uniformly without a seed layer on both dielectrics. The chemical stability of these metal/dielectric interfaces is studied by sequential on-line rapid thermal annealing treatments up to 850 °C and AES. TiNx reacts with SiO2 above 850 °C but the addition of a Si3N4 dielectric top-layer makes the TiNx/ON interface chemically stable at 850 °C. WNx/SiO2 and WNx/Si3N4 interfaces are both stable below 650 °C. MOS capacitors using TiNx or WNx metal gates and thermal SiO2 gate dielectrics exhibit excellent capacitance-voltage characteristics. The work function for TiNx lies near midgap in Si while for WNx it lies closer to the valence band.

1999 ◽  
Vol 567 ◽  
Author(s):  
B. Claflin ◽  
K. Flock ◽  
G. Lucovsky

ABSTRACTSeveral metal and conducting metal nitride candidates were investigated for alternative gate electrode applications in future complimentary metal-oxide-semiconductor (CMOS) devices. High frequency capacitance-voltage (CV) measurements were performed on n-MOS and p-MOS capacitors with Al, Ta, TaN, TIN, or W2N gates and ultra-thin SiO2/Si3N4 dielectric stacks. The work functions of Al and Ta were close to the conduction band of Si as expected while all the metal nitrides had work functions slightly above mid-gap. The thermal stability of the metal nitrides and the metal/dielectric interfaces was studied by Auger electron spectroscopy (AES) following rapid thermal annealing (RTA). Integration requirements for dual metal gate electrodes in future CMOS devices are discussed.


1995 ◽  
Vol 387 ◽  
Author(s):  
S. V. Hattangady ◽  
H. Niimi ◽  
S. Gandhi ◽  
G. Lucovsky

AbstractThin film dielectrics have been prepared in a cluster processing system with chambers for plasma-assisted, rapid-thermal processing, and on-line Auger electron spectroscopy (AES). A low-thermal budget process for the formation of homogeneous silicon oxynitride (OXN) alloy films is presented. This Na2-based plasma-CVD process has (i) increased process latitude for the formation of N-rich alloys, and (ii) results in lower bonded-H concentrations, in comparison with a similar NH3-based process. Gate dielectric formation consists of (i) a 300°C plasma-assisted oxidation for removal of residual hydrocarbons, and formation of an Si-SiO2 interface protected by ∼0.5-0.6 nm of oxide, (ii) a 300°C plasma-assisted CVD of oxynitride films from N2O, N2, and SiH4, and (iii) a 30 s, 900°C post-deposition rapid-thermal anneal in an ambient that contains sufficient oxygen to prevent decomposition of the Si/SiO2 interface. On-line AES and off-line infrared (IR) spectroscopy have been used to characterize chemical bonding, showing that the deposited films are pseudo-binary alloys lying on a join-line from SiO2 and Si3N4 in a ternary composition diagram. Electrical characterization of MOS capacitors, consisting of O-OXN-O structures, using C-V techniques is discussed.


2000 ◽  
Vol 609 ◽  
Author(s):  
S. Lombardo ◽  
I. Crupi ◽  
C. Spinella ◽  
C. Bongiorno ◽  
Y. Liao ◽  
...  

ABSTRACTTo form crystalline Si dots embedded in SiO2, we have deposited thin films of silicon rich oxide (SRO) by plasma-enhanced chemical vapor deposition of SiH4 and O2. Then the materials wereannealed in N2 ambient at temperatures between 950 and 1100 °C. Under such processing, the supersaturation of Si in the amorphous SRO film produces the formation of crystalline Si dots embedded in SiO2. The narrow dot size distributions, analyzed by transmission electron microscopy, are characterized by average grain radii and standard deviations down to about 1 nm. The memory function of such structures has been investigated in metal-oxidesemiconductor (MOS) capacitors with a SRO film sandwiched between two thin SiO2 layers as insulator and with an n+ polycrystalline silicon gate. The operations of write and storage are clearly detected by measurements of hysteresis in capacitance-voltage characteristics and they have been studied as a function of bias.


2009 ◽  
Vol 1208 ◽  
Author(s):  
Seiichi Miyazaki ◽  
Naoya Morisama ◽  
Sho Nakanishi ◽  
Mitsuhisa Ikeda ◽  
Katsunori Makihara

AbstractWe have proposed and fabricated a hybrid nanodots floating gate (FG), in which Si quantum dots (QDs) as charge injection/emission nodes and NiSi nanodots as charge storage nodes are stacked with an ultrathin SiO2 interlayer, to satisfy both large memory window and multivalued capability. In this study, Si-QDs with an areal density of ˜3×1011cm-2 were formed on ultrathin SiO2 layer by controlling SiH4 chemical vapor deposition (CVD) and NiSi nanodots were prepared by full-silicidation of Si-QDs promoted with remote H2-plasma exposure after Ni evaporation. From capacitance-voltage(C-V) characteristics of MOS capacitors with a NiSi nanodots/Si-QDs hybrid FG, stable storage of many charges in the deep potential well of each NiSi nanodot was confirmed. Also, by applying pulsed gate biases, stepwise charge injection to and emission from NiSi nanodots through discrete energy states in Si-QDs were demonstrated. In addition, by 1310nm (˜0.95eV) light irradiation, a distinct optical response in C-V characteristics was detected, which can be interpreted in terms of the shift of charge centroid in the hybrid FG stack due to transfer of photoexcited electrons from NiSi-nanodots to the Si-QDs.


1992 ◽  
Vol 284 ◽  
Author(s):  
Y. Ma ◽  
T. Yasuda ◽  
Y. L. Chen ◽  
G. Lucovsky ◽  
D. M. Maher

ABSTRACTOxide-Nitride-Oxide, ONO, heterostructures, fabricated by low-temperature, 300°C, Remote Plasma Enhanced Chemical Vapor Deposition, have been used as gate dielectrics in metal insulator semiconductor devices. Analysis of C-V data for this devices indicates that higher levels of fixed charge are associated with the internal dielectric interfaces. A high-temperature, ̃900°C, Rapid Thermal Annealing, RTA, step has been inserted into the process sequence for fabricating ultra-thin, 4.7 nm SiO2 equivalent, device-quality ONO dielectric layers. The electrical properties of these ONO dielectrics, including the Si/SiO2 interfacial trap density, the flat band voltage, the charge to breakdown and the reliability under electron injection are comparable to those of high temperature, thermally-grown oxides.


2007 ◽  
Vol 556-557 ◽  
pp. 627-630 ◽  
Author(s):  
Svetlana Beljakowa ◽  
Thomas Frank ◽  
Gerhard Pensl ◽  
Kun Yuan Gao ◽  
Florian Speck ◽  
...  

An alternative oxidation technique is developed and built up, which provides monatomic oxygen during the whole oxidation process. The set-up consists of a tungsten lamp furnace and a microwave-plasma. A number of different gases can be introduced into the oxidation quartz tube. In addition, an Al2O3-layer is deposited on a part of the oxide layers by atomic layer chemical vapor deposition (ALCVD). First oxidation runs result in encouraging low values of the density of interface states Dit and in the flatband voltage UFB. It turns out that with the present experimental conditions, the comparison of MOS capacitors fabricated with different dielectric layers favors gate dielectrics grown in O2/N2-ambient.


1994 ◽  
Vol 343 ◽  
Author(s):  
Jaeshin Cho ◽  
Naresh C. Saha

ABSTRACTWe have studied the chemical stability of reactively sputtered aluminum nitride film with plasma-enhanced chemical vapor deposited SiO2 and SiNx films. It was found that the PECVD SiO2 film reacted with A1N to form aluminosilicate (3Al2O3·2SiO2) at the SiO2/A1N interface after annealing above 550°C. The presence of Al-0 bonds at the SiO2/AlN interface was verified with x-ray photoelectron spectroscopy and x-ray induced Auger electron spectroscopy. The formation of aluminosilicate resulted in significant decrease in the wet etch rate of A1N layer. For SiNx/AlN/Si layered structure, no interfacial reactions were detected at the SiNx/AlN interface after annealing up to 850°C. These results confirm the thermodynamic predictions on the mutual stability of SiNx/AlN and SiO2/AlN.


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