Simulation Study of SVPWM Control Technology for NPC Inverter

2013 ◽  
Vol 347-350 ◽  
pp. 392-395
Author(s):  
Song Li

With the development of high voltage technology ,the inverter power is becoming higher and higher . The traditional two-level inverter capacity has been difficult to achieve high power requirements due to the limitation of the power electronic devices. Therefore, different new kinds of multilevel inverter topologies with high-performance are proposed by the scientist all over the world. This paper introduces the topology structure, characteristics and working principle of threelevel inverter, and makes a detailed description of space vector pulse width modulation principle. Finally, the simulation waveforms are presented with Matlab/Simulink, the results verifies the validity of the theoretical analysis.

Author(s):  
S. Sridhar ◽  
P. Satish Kumar ◽  
M. Susham

<p>This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.</p>


Author(s):  
Amer Chlaihawi ◽  
Adnan Sabbar ◽  
Hur Jedi

This paper introduces a new topology of multilevel inverter, which is able to operate at high performance. This proposed circuit achieves requirements of reduced number of switches, gate-drive circuits, and high design flexibility. In most cases fifteen-level inverters need at least twelve switches. The proposed topology has only ten switches. The inverter has a quasi-sine output voltage, which is formed by level generator and polarity changer to produce the desired voltage and current waveforms. The detailed operation of the proposed inverter is explained. The theoretical analysis and design procedure are given. Simulation results are presented to confirm the analytical approach of the proposed circuit. A 15-level and 31-level multilevel inverters were designed and tested at 50 Hz.


2021 ◽  
Author(s):  
Baharuddin Ismail ◽  
Muzamir Isa ◽  
M. Z. Aikhsan ◽  
M. N. K. H. Rohani ◽  
C. L. Wooi ◽  
...  

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 853 ◽  
Author(s):  
Abdul Yasin ◽  
Muhammad Ashraf ◽  
Aamer Bhatti

The key issue in the implementation of the Sliding Mode Control (SMC) in analogue circuits and power electronic converters is its variable switching frequency. The drifting frequency causes electromagnetic compatibility issues and also adversely affect the efficiency of the converter, because the proper size of the inductor and the capacitor depends upon the switching frequency. Pulse Width Modulation based SMC (PWM-SMC) offers the solution, however, it uses either boundary layer approach or employs pulse width modulation of the ideal equivalent control signal. The first technique compromises the performance within the boundary layer, while the latter may not possess properties like robustness and order reduction due to the absence of the discontinuous function. In this research, a novel approach to fix the switching frequency in SMC is proposed, that employs a low pass filter to extract the equivalent control from the discontinuous function, such that the performance and robustness remains intact. To benchmark the experimental observations, a comparison with existing double integral type PWM-SMC is also presented. The results confirm that an improvement of 20% in the rise time and 25.3% in the settling time is obtained. The voltage sag during step change in load is reduced to 42.86%, indicating the increase in the robustness. The experiments prove the hypothesis that a discontinuous function based fixed frequency SMC performs better in terms of disturbances rejection as compared to its counterpart based solely on ideal equivalent control.


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