Quantitative Evaluation of Voids in Lead Free Solder Joints

2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi
Keyword(s):  
Solder Bump ◽  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
X Ray ◽  
Size And Shape ◽  
Solder Bumps ◽  
Free Solder

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.

SAC–xTiO2 nano-reinforced lead-free solder joint characterizations in ultra-fine package assembly

2018 ◽  
Vol 30 (1) ◽  
pp. 1-13 ◽  
Author(s):  
Fakhrozi Che Ani ◽  
Azman Jalar ◽  
Abdullah Aziz Saad ◽  
Chu Yee Khor ◽  
Roslina Ismail ◽  
...  
Keyword(s):  
Electron Microscope ◽  
Solder Joint ◽  
Solder Joints ◽  
Ion Beam ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Content Type ◽  
X Ray ◽  
Free Solder

Purpose This paper aims to investigate the characteristics of ultra-fine lead-free solder joints reinforced with TiO2 nanoparticles in an electronic assembly. Design/methodology/approach This study focused on the microstructure and quality of solder joints. Various percentages of TiO2 nanoparticles were mixed with a lead-free Sn-3.5Ag-0.7Cu solder paste. This new form of nano-reinforced lead-free solder paste was used to assemble a miniature package consisting of an ultra-fine capacitor on a printed circuit board by means of a reflow soldering process. The microstructure and the fillet height were investigated using a focused ion beam, a high-resolution transmission electron microscope system equipped with an energy dispersive X-ray spectrometer (EDS), and a field emission scanning electron microscope coupled with an EDS and X-ray diffraction machine. Findings The experimental results revealed that the intermetallic compound with the lowest thickness was produced by the nano-reinforced solder with a TiO2 content of 0.05 Wt.%. Increasing the TiO2 content to 0.15 Wt.% led to an improvement in the fillet height. The characteristics of the solder joint fulfilled the reliability requirements of the IPC standards. Practical implications This study provides engineers with a profound understanding of the characteristics of ultra-fine nano-reinforced solder joint packages in the microelectronics industry. Originality/value The findings are expected to provide proper guidelines and references with regard to the manufacture of miniaturized electronic packages. This study also explored the effects of TiO2 on the microstructure and the fillet height of ultra-fine capacitors.

Void Formation and Their Effect on Reliability of Lead-Free Solder Joints on MID and PCB Substrates

2017 ◽  
Vol 66 (4) ◽  
pp. 1229-1237 ◽  
Author(s):  
P. Wild ◽  
T. Grozinger ◽  
D. Lorenz ◽  
A. Zimmermann
Keyword(s):  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
Free Solder

An Investigation of the Lead-Free Surface Mount Soldering Process: Solder Joint Evaluation and Process Optimisation

2004 ◽  
Author(s):  
Claire Ryan ◽  
Jeff M. Punch ◽  
Bryan Rodgers ◽  
Greg Heaslip ◽  
Shane O’Neill ◽  
...  
Keyword(s):  
Screen Printing ◽  
Solder Joints ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Surface Mount ◽  
Snagcu Solder ◽  
Soldering Process ◽  
Free Process ◽  
Free Solder

A European Union ban on lead in most electrical and electronic equipment will be imposed as of July 1st 2006. The ban, along with market pressures, means that manufacturers must transfer from a tin-lead soldering process to a lead-free process. In this paper the implications on the surface mount (SMT) soldering process are presented. A set of experiments was conducted to investigate the screen-printing and reflow steps of the SMT process using a tin-silver-copper (95.5Sn3.8Ag0.7Cu) solder and a baseline of standard tin-lead (63Sn37Pb). 10×10 arrays of micro Ball Grid Array (micro-BGA) components mounted on 8-layer FR4 printed wiring boards (PWBs) were used. The screen-printing experiment addressed the deposition of the solder paste on the board. The parameters used in the investigation were print speed, squeegee pressure, snap-off distance, separation speed and cleaning interval, with the responses being measurements of paste height and volume. Optimum screen-printer settings were determined which give adequate paste volume and height and a good print definition. The reflow experiment investigated the following parameters of the temperature profile: preheat, soak, peak and cool down temperatures, and conveyor speed. The resulting solder joints were evaluated using cross-section analysis and x-ray techniques in order to determine the presence of defects. A mechanical fatigue test was also carried out in order to compare the strength of the solder joints. The overall quality of the lead-free solder joints was determined from these tests and compared to that of tin-lead. The outcome is a set of manufacturing guidelines for transferring to lead-free solder including optimum screen-printer and reflow oven settings for use with an SnAgCu solder.

Ripening-assisted void formation in the matrix of lead-free solder joints during solid-state aging

2007 ◽  
Vol 22 (4) ◽  
pp. 826-830 ◽  
Author(s):  
J.W. Jang ◽  
J.K. Lin ◽  
D.R. Frear ◽  
T.Y. Lee ◽  
K.N. Tu
Keyword(s):  
Solid State ◽  
Solder Joints ◽  
Solder Matrix ◽  
Void Formation ◽  
Stress Generation ◽  
Lead Free ◽  
Joint Interface ◽  
Formation Mechanisms ◽  
Lead Free Solder ◽  
Free Solder

Void formation in lead-free solder joints, away from the joint interface, has been observed after solid-state aging. These voids are attached to intermetallic precipitates in the solder matrix, especially to those that are adjacent to the layered intermetallic at the joint interface. Two potential void formation mechanisms are discussed. The mechanism proposed to describe void formation is that a flux of vacancies is created due to volume contraction during solid-state reaction. The ripening process among the intermetallics also assists this process. Using the suggested mechanisms, the void size was estimated. This phenomenon differs from the classical Kirkendall void formation because it is a nonequilibrium state of void formation and stress generation.

Experimental Study of Void Formation in Eutectic and Lead-Free Solder Bumps of Flip-Chip Assemblies

2005 ◽  
Vol 128 (3) ◽  
pp. 202-207 ◽  
Author(s):  
Daijiao Wang ◽  
Ronald L. Panton
Keyword(s):  
Experimental Study ◽  
Heat Flux ◽  
Flip Chip ◽  
Void Formation ◽  
Lead Free ◽  
Void Volume ◽  
Lead Free Solder ◽  
Solder Bumps ◽  
Free Solder ◽  
High Lead

This paper reports the experimental findings of void formation in eutectic and lead-free solder joints of flip-chip assemblies. A previous theory indicated that the formation of voids is determined by the direction of heating. The experiments were designed to examine the size and location of voids in the solder samples subject to different heat flux directions. A lead-free solder (Sn-3.5Ag-0.75Cu) and a eutectic solder (63Sn37Pb) were employed in the experiments. Previous experiments [Wang, D., and Panton, R. L., 2005, “Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies,” ASME J. Electron. Packag., 127(2), pp. 120–126; 2005, “Effect of Reversing Heat Flux Direction During Reflow on Void Formation in High-Lead Solder Bumps,” ASME J. Electron. Packag., 127(4), pp. 440–445] employed a high lead solder. 288 solder bumps were processed for each solder. Both eutectic and lead-free solder have shown fewer voids and much smaller void volume than those for high-lead solder. Compared with lead-free solder, eutectic solder has a slightly lower void volume and a lower percentage of defective bumps. For both eutectic and lead-free solders, irrespective of the cooling direction, heating solder samples from the top shows fewer defective bumps and smaller void volume. No significant effect on void formation for either eutectic or lead-free solder was found via reversing the heat flux direction during cooling. Unlike high-lead solder, small voids in eutectic or lead-free solder comprised 35-88% of the total void volume. The final distribution of voids shows a moderate agreement with thermocapillary theory, indicating the significance of the temperature gradient on the formation of voids.

Influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) technology

2015 ◽  
Vol 27 (3) ◽  
pp. 98-102 ◽  
Author(s):  
Janusz Sitek ◽  
Wojciech Stęplewski ◽  
Kamil Janeczek ◽  
Marek Kościelski ◽  
Krzysztof Lipiec ◽  
...  
Keyword(s):  
Solder Joints ◽  
Accelerated Aging ◽  
Lead Free ◽  
Process Window ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Materials Selection ◽  
Content Type ◽  
Free Solder ◽  
Component Assembly

Purpose – The purpose of this paper is to evaluate the influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) Technology and demonstrate factors important for this issue. Design/methodology/approach – Two types of soldering materials and three different assembly procedures were used for assembly of PoP system. The reliability properties of assembled PoP systems were investigated using accelerated aging and periodic resistance measurements of daisy-chain solder joints systems. The purpose of such approach was to determine which soldering material (flux or solder paste) as well as which assembly process parameter (dipping depth of upper component in soldering material), would provide better reliability properties of the solder joints in the PoP system. Findings – It was stated that both selected flux and solder paste dedicated to assembly of PoP systems can be utilized in soldering of PoP applications. More reliable PoP systems applications require larger attention regarding materials selection and assembly parameters. It is recommended 50 per cent dipping depth of ball’s height into soldering material during upper PoP component assembly for more reliable applications. For less demanding PoP systems, the process window from 30 up to 70 per cent is acceptable. All observed failures after thermal shocks occurred in upper PoP components. Originality/value – This paper explains how materials and assembly parameters have influence on lead-free solder joints reliability in PoP systems. Especially, influence of process window for dipping procedure of upper components balls into soldering material was presented.

scholarly journals Crystallographically Faceted Void Formation in the Matrix of Lead-Free Solder Joints

2010 ◽  
Vol 39 (8) ◽  
pp. 1295-1297 ◽  
Author(s):  
S. Belyakov ◽  
H. V. Atkinson ◽  
S. P. A. Gill
Keyword(s):  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
The Matrix ◽  
Free Solder

Void Inspection in Lead-Free Solder Bumps on Ball Grid Array (BGA) Packages Using Laser Ultrasound Technique

2011 ◽  
Author(s):  
Jie Gong ◽  
I. Charles Ume
Keyword(s):  
Ball Grid Array ◽  
Lead Free ◽  
Inspection System ◽  
Laser Ultrasound ◽  
Lead Free Solder ◽  
X Ray ◽  
Bga Packages ◽  
Solder Bumps ◽  
Free Solder ◽  
Ultrasound Inspection

Solder joint voids are usually formed by the entrapped gas bubbles during the reflow process, and are common in all surface mount applications. It is a controversial issue on the reliability of the solder joint, however the consensus is that voiding is acceptable at low contents, while excessive voiding affects mechanical properties, and decreases strength, ductility and fatigue life of the interconnections. X-ray is the most widely used technique to evaluate the voids, including the size and occurrence frequency. In this paper, a laser ultrasound and interferometer inspection system is used to inspect the voids in lead-free solder bumps in ball grid array (BGA) packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; and laser interferometer is used to measure the transient out-of-plane displacement response of the package surface to the laser irradiation. The quality of solder bumps is evaluated by analyzing the transient responses. In this work, voids were intentionally created by adding the volatile flux during the assembly process. By controlling the volume of flux dip, three different levels of voiding were proposed: void-free, relatively low and relatively high. The presence of voids in the solder bumps was first verified using 2-D X-ray techniques. Meanwhile, the built-in image-processing software in X-ray tool measured the void fraction to quantify the level of voiding. Then the laser ultrasound inspection system was used to evaluate the voids in these samples. By comparing the vibration responses from voided samples and void-free samples, it was found that the laser ultrasound inspection system is capable to differentiate samples with relatively high voiding from void-free samples while the relatively low voiding was below the resolution of the inspection system. Lastly, a further comparison between the void-free and voided solder bumps was carried out by the destructive cross-section technique. The comparisons between these three solder bump evaluation methods will be presented in this paper.

Nondestructive Evaluation of Thermal Fatigue Crack Propagation in Sn-Ag-Cu Solder Joints by Synchrotron Radiation X-Ray Micro-Tomography

2009 ◽  
Author(s):  
Hiroyuki Tsuritani ◽  
Toshihiko Sayama ◽  
Yoshiyuki Okamoto ◽  
Takeshi Takayanagi ◽  
Kentaro Uesugi ◽  
...  
Keyword(s):  
Crack Propagation ◽  
Nondestructive Evaluation ◽  
Thermal Cycle ◽  
Solder Joints ◽  
Fatigue Cracks ◽  
Lead Free Solder ◽  
X Ray ◽  
Solder Bumps ◽  
Micro Tomography ◽  
Free Solder

An X-ray micro-tomography system called SP-μCT, which has a spatial resolution of 1 μm, has been developed in SPring-8, the largest synchrotron radiation facility in Japan. In this work, SP-μCT was applied to the nondestructive evaluation of micro-crack propagation appearing as thermal fatigue damage in lead-free solder joints. The observed specimens include two typical micro-joint structures by Sn-3.0wt%Ag-0.5wt%Cu lead-free solder. The first is an FBGA (Fine pitch Ball Grid Array) joint specimen in which an LSI package is connected to a substrate by solder bumps 360 μm in diameter, while the second is a chip joint specimen in which chip type resistors 1.6 mm in length and 0.8 mm. in width are mounted on a substrate. A thermal cycle test was carried out, and the specimens were picked up at fixed cycle numbers. The same solder joints were observed repeatedly using SP-μCT at beamline BL20XU in SPring-8. An X-ray energy of 29.0 keV was selected to obtain CT (Computed Tomography) images with high contrast among some components, and a refraction-contrast imaging technique was also applied to the visualization of fatigue cracks in the solder joints. In the FBGA type specimens, fatigue cracks appeared at the periphery of the interfaces between the solder and the UBM (Under Bump Metallization) on the LSI package. As the thermal cycle proceeds, the cracks propagate gradually to the inner region of the solder bumps in the vicinity of the interface. On the basis of the three-dimensional crack images, the fatigue crack propagation lifetime was accurately estimated by means of the average crack propagation rate. On the other hand, in the chip joint specimens, fatigue cracks appeared and propagated through the thin solder layer between the chip and substrate. In contrast to the FBGA specimen, many small voids roughly 5 to 10 μm in length were formed in the solder layer. The important observed fact is that these voids deform and connect to each other due to the thermal cyclic loading prior to crack propagation. Consequently, the obtained CT images clearly show the process of crack propagation due to the thermal cyclic loading of the same solder joint. In contrast, such information has not been obtained, whatsoever by industrially employed X-ray CT systems.

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