Void Inspection in Lead-Free Solder Bumps on Ball Grid Array (BGA) Packages Using Laser Ultrasound Technique

Author(s):  
Jie Gong ◽  
I. Charles Ume

Solder joint voids are usually formed by the entrapped gas bubbles during the reflow process, and are common in all surface mount applications. It is a controversial issue on the reliability of the solder joint, however the consensus is that voiding is acceptable at low contents, while excessive voiding affects mechanical properties, and decreases strength, ductility and fatigue life of the interconnections. X-ray is the most widely used technique to evaluate the voids, including the size and occurrence frequency. In this paper, a laser ultrasound and interferometer inspection system is used to inspect the voids in lead-free solder bumps in ball grid array (BGA) packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; and laser interferometer is used to measure the transient out-of-plane displacement response of the package surface to the laser irradiation. The quality of solder bumps is evaluated by analyzing the transient responses. In this work, voids were intentionally created by adding the volatile flux during the assembly process. By controlling the volume of flux dip, three different levels of voiding were proposed: void-free, relatively low and relatively high. The presence of voids in the solder bumps was first verified using 2-D X-ray techniques. Meanwhile, the built-in image-processing software in X-ray tool measured the void fraction to quantify the level of voiding. Then the laser ultrasound inspection system was used to evaluate the voids in these samples. By comparing the vibration responses from voided samples and void-free samples, it was found that the laser ultrasound inspection system is capable to differentiate samples with relatively high voiding from void-free samples while the relatively low voiding was below the resolution of the inspection system. Lastly, a further comparison between the void-free and voided solder bumps was carried out by the destructive cross-section technique. The comparisons between these three solder bump evaluation methods will be presented in this paper.

Author(s):  
Jie Gong ◽  
I. Charles Ume

A novel laser ultrasound and interferometer inspection system has been successfully applied to detect solder joint defects including missing, misaligned, open, and cracked solder bumps in flip chips, land grid array packages and chip capacitors. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; it then measures the transient out-of-plane displacement response on the package surface using a laser interferometer. The quality of solder bumps is evaluated by analyzing the transient responses. In this paper, the application of this system is expanded to evaluate quality of lead-free solder bumps in ball grid array (BGA) packages; specifically BGA packages with poor wetting are used as test vehicles. Poor wetting not only decreases the mechanical strength of interconnection at the interface between the solder bumps and substrate, but also increases electrical resistance, which is a reliability issue. Causes of poor wetting vary from materials themselves to manufacturing process. Here, poor wetting of solder bumps were intentionally created by using an improper reflow profile. The transient out-of-plane displacement responses from these packages were compared with the responses from defect-free samples. Solder bumps with poor wetting were distinguished from the normal solder bumps by unusual correlation coefficient. Then, laser ultrasound inspection results are also compared with results from X-ray inspection and continuity test. Finally, the cross-section images were used to further confirm the existence of the poor wetting in samples with unusual correlation coefficient. It can be concluded that this laser-ultrasound system is capable of identifying the presence of poor wetting in BGA packages.


2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.


2019 ◽  
Vol 31 (2) ◽  
pp. 109-124 ◽  
Author(s):  
Fakhrozi Che Ani ◽  
Azman Jalar ◽  
Abdullah Aziz Saad ◽  
Chu Yee Khor ◽  
Mohamad Aizat Abas ◽  
...  

Purpose This study aims to investigate the NiO nano-reinforced solder joint characteristics of ultra-fine electronic package. Design/methodology/approach Lead-free Sn-Ag-Cu (SAC) solder paste was mixed with various percentages of NiO nanoparticles to prepare the new form of nano-reinforced solder paste. The solder paste was applied to assemble the ultra-fine capacitor using the reflow soldering process. A focussed ion beam, high resolution transmission electron microscopy system equipped with energy dispersive X-ray spectroscopy (EDS) was used in this study. In addition, X-ray inspection system, field emission scanning electron microscopy coupled with EDS, X-ray photoelectron spectroscopy (XPS) and nanoindenter were used to analyse the solder void, microstructure, hardness and fillet height of the solder joint. Findings The experimental results revealed that the highest fillet height was obtained with the content of 0.01 Wt.% of nano-reinforced NiO, which fulfilled the reliability requirements of the international IPC standard. However, the presence of the NiO in the lead-free solder paste only slightly influenced the changes of the intermetallic layer with the increment of weighted percentage. Moreover, the simulation method was applied to observe the distribution of NiO nanoparticles in the solder joint. Originality/value The findings are expected to provide a profound understanding of nano-reinforced solder joint’s characteristics of the ultra-fine package.


2015 ◽  
Vol 1087 ◽  
pp. 162-166
Author(s):  
Nor Aishah Jasli ◽  
Hamidi Abd Hamid ◽  
Ramani Mayappan

This study investigated the effect of Ni addition on intermetallic formation in the Sn-8Zn-3Bi solder under liquid state aging. The intermetallic compounds were formed by reacting the solder alloy with copper substrate. Different reflow time was used at temperature 220°C. Morphology of the phases formed was observed using scanning electron microscope (SEM) and in order to determine elemental compositions of the phases, energy dispersive x-ray (EDX) was used. The formation of the reaction layer led by Cu5Zn8 intermetallic and then followed by Cu6Sn5 and Cu3Sn when reflow time increases. Keywords: lead free solder, intermetallic, Cu5Zn8, Cu6Sn5, liquid state aging.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000799-000805
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Bernd Kandler ◽  
Bernd Burger

Electromigration comprises one of the processes affecting the long-term reliability of electronic devices; it has therefore been the focus of many investigations in recent years. In regards to flip chip packaging technology, the majority of published data is concerned with electromigration in solder connections to metallized organic substrates. Hardly any information is available in the literature on electromigration in lead-free solder connections on thin film ceramic substrates. This work presents results of a study of electromigration in lead-free (SAC305) flip chip solder bumps with a nominal diameter of 40 μm or 30 μm with a pitch of 100 μm on silicon chips assembled onto thin film Al2O3 ceramic substrates. The under bump metallization (UBM) comprised of a 5 μm thick electroless nickel immersion gold (ENIG) layer directly deposited on the AlCu0.5 trace. The ceramic substrates were metallized using a thin film multilayer (NiCr-Au(1.5 μm)-Ni(2 μm) structure on the top of which wettable areas were produced with high precision by depositing flash Au (60 nm) of the required diameter (40 μm or 30 μm). All electromigration tests were performed at the temperature of 125 °C. Initially, one chip assembly with 40 μm and one with 30 μm solder bumps was loaded with the current density of 8 kA/cm2 for 1,000 h. The assemblies did not fail and an investigation with SEM revealed no significant changes to the microstructure of the bumps. Thereafter seven chip assemblies with 40 μm solder bumps and five assemblies with 30 μm bumps were subjected to electromigration tests of 14 kA/cm2 or 25 kA/cm2, respectively. Six of the 40 μm-assemblies failed after 7,000 h and none of the 30 μm-assemblies failed after 2,500 h of test duration so far. Investigation of failed samples performed with SEM and EDX showed asymmetric changes of microstructure in respect to current flow. Several intermetallic phases were found to form in the solder. The predominant damage of the interconnects was found to occur at the cathode contact to chip; the Ni-P layers there showed typical columnar Kirkendall voids caused by migration of Ni from the layers into the solder. Failure of the contacts apparently occurred at the interface between Ni-P and solder. In summary, the results of the study indicate a very high stability of lead-free solder connections on ceramic substrates against electromigration. This high stability is primarily due to a better heat dissipation and thus to a relatively low temperature increase of the ceramic packages caused by resistive heating during flow of electric current. In addition, the type of the metallization used in the study seems to be more resistant to electromigration than the standard PCB metallization as it does not contain a copper layer.


2009 ◽  
Vol 131 (1) ◽  
Author(s):  
Jin Yang ◽  
I. Charles Ume

Microelectronics packaging technology has evolved from through-hole and bulk configurations to surface-mount and small-profile configurations. Surface mount devices, such as flip chip packages, chip scale packages, and ball grid arrays, use solder bump interconnections between them and substrates/printed wiring boards. Solder bumps, which are hidden between the device and the substrate/board, are difficult to inspect. A solder bump inspection system was developed using laser ultrasound and interferometric techniques. This system has been successfully applied to detect solder joint/bump defects, including missing, misaligned, open, and cracked solder joints/bumps in flip chips, chip scale packages, and multilayer ceramic capacitors. This system uses a pulsed Nd:YAG laser to induce ultrasound in the electronic packages in the thermoelastic regime; it then measures the transient out-of-plane displacement response on the package surface using the interferometric technique. This paper presents a local temporal coherence (LTC) analysis of laser ultrasound signals and compares it to previous signal-processing methods, including error ratio and correlation coefficient methods. The results showed that LTC analysis increased measurement accuracy and sensitivity for inspecting solder bump defects in electronic packages. Laser ultrasound inspection results are also compared with X-ray and C-mode scanning acoustic microscopy results. In particular, this paper discusses defect detection for 6.35×6.35×0.6 mm3 flip chips and flip chips (“SiMAF;” Siemens AG) with lead-free solder bumps.


2018 ◽  
Vol 30 (1) ◽  
pp. 1-13 ◽  
Author(s):  
Fakhrozi Che Ani ◽  
Azman Jalar ◽  
Abdullah Aziz Saad ◽  
Chu Yee Khor ◽  
Roslina Ismail ◽  
...  

Purpose This paper aims to investigate the characteristics of ultra-fine lead-free solder joints reinforced with TiO2 nanoparticles in an electronic assembly. Design/methodology/approach This study focused on the microstructure and quality of solder joints. Various percentages of TiO2 nanoparticles were mixed with a lead-free Sn-3.5Ag-0.7Cu solder paste. This new form of nano-reinforced lead-free solder paste was used to assemble a miniature package consisting of an ultra-fine capacitor on a printed circuit board by means of a reflow soldering process. The microstructure and the fillet height were investigated using a focused ion beam, a high-resolution transmission electron microscope system equipped with an energy dispersive X-ray spectrometer (EDS), and a field emission scanning electron microscope coupled with an EDS and X-ray diffraction machine. Findings The experimental results revealed that the intermetallic compound with the lowest thickness was produced by the nano-reinforced solder with a TiO2 content of 0.05 Wt.%. Increasing the TiO2 content to 0.15 Wt.% led to an improvement in the fillet height. The characteristics of the solder joint fulfilled the reliability requirements of the IPC standards. Practical implications This study provides engineers with a profound understanding of the characteristics of ultra-fine nano-reinforced solder joint packages in the microelectronics industry. Originality/value The findings are expected to provide proper guidelines and references with regard to the manufacture of miniaturized electronic packages. This study also explored the effects of TiO2 on the microstructure and the fillet height of ultra-fine capacitors.


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