Mechanism of Carrier Transport in n-Type β-FeSi2/Intrinsic Si/p-Type Si Heterojunctions

2015 ◽  
Vol 1119 ◽  
pp. 189-193
Author(s):  
Nathaporn Promros ◽  
Motoki Takahara ◽  
Ryuji Baba ◽  
Tarek M. Mostafa ◽  
Mahmoud Shaban ◽  
...  
Keyword(s):  
Ideality Factor ◽  
Carrier Transport ◽  
Linear Part ◽  
Forward Bias ◽  
Thermionic Emission ◽  
Forward Bias Voltage ◽  
Space Charge Limit ◽  
Current Voltage ◽  
P Type ◽  
Direct Current Sputtering

Preparation of n-type β-FeSi2/intrinsic Si/p-type Si heterojunctions was accomplished by facing-target direct-current sputtering (FTDCS) and measuring their current-voltage characteristic curves at low temperatures ranging from 300 K down to 50 K. A mechanism of carrier transport in the fabricated heterojunctions was investigated based on thermionic emission theory. According to this theory, the ideality factor was calculated from the slope of the linear part of the forward lnJ-V plot. The ideality factor was 1.12 at 300 K and increased to 1.99 at 225 K. The estimated ideality factor implied that a recombination process was the predominant mechanism of carrier transport. When the temperatures decreased below 225 K, the ideality factor was estimated to be higher than two and parameter A was estimated to be constant. The obtained results implied that the mechanism of carrier transport was governed by a trap-assisted multi-step tunneling process. At high forward bias voltage, the predominant mechanism of carrier transport was changed into a space charge limit current process.

Diode Parameters of Heterojunctions Comprising p-Type Si Substrate and n-Type β-FeSi2 Thin Films

2014 ◽  
Vol 1043 ◽  
pp. 57-61
Author(s):  
Nathaporn Promros ◽  
Suguru Funasaki ◽  
Motoki Takahara ◽  
Mahmoud Shaban ◽  
Tsuyoshi Yoshitake
Keyword(s):  
Current Density ◽  
Ideality Factor ◽  
Linear Part ◽  
Thermionic Emission ◽  
Saturation Current ◽  
Straight Line ◽  
Current Voltage ◽  
Saturation Current Density ◽  
P Type ◽  
Direct Current Sputtering

n-Type β-FeSi2/p-type Si heterojunctions have been successfully fabricated by facing-targets direct-current sputtering at a substrate temperature of 600 °C without post-annealing and their current-voltage characteristics were measured at low temperatures ragne from 300 K down to 50 K. The ideality factor, saturation current and series resistance were estimated by the thermionic emission theory and Cheung’s method. By the thermionic emission theory, we calculated the ideality factor from the slope of the linear part from the forward lnJ-V and estimated the saturation current density from the straight line intercept of lnJ-V at a zero voltage. As decreasing temperatures from 300 down to 50 K, the value of ideality factor increased from 1.2 to 15.6, while the value of saturation current density decreased from 1.6 × 10−6 A/cm2 to 3.8 × 10−10 A/cm2. From the plots of dV/d (lnJ)-J and H(J)-J by Cheung’s method, the obtained values of series resistances are consistent with each other. The series resistances analyzed from both plots increased as decreasing temperatures.

Electrical Characteristics of n-Type Nanocrystalline FeSi2/Intrinsic Si/p-Type Si Heterojunctions Prepared by Facing-Targets Direct-Current Sputtering

2013 ◽  
Vol 446-447 ◽  
pp. 88-92
Author(s):  
Nathaporn Promros ◽  
Suguru Funasaki ◽  
Ryūhei Iwasaki ◽  
Tsuyoshi Yoshitake
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Low Temperatures ◽  
Series Resistance ◽  
Linear Part ◽  
Thermionic Emission ◽  
Straight Line ◽  
Current Voltage ◽  
P Type ◽  
Direct Current Sputtering

n-Type nanocrystalline FeSi2/intrinsic Si/p-type Si heterojunctions were prepared by FTDCS. In order to estimate their diode parameters such as ideality factor, barrier height and series resistance, their current-voltage characteristics were measured in the temperature range from 300 to 77 K and analyzed on the basis of thermionic emission theory and Cheungs method. Based on thermionic emission theory, the ideality factor was calculated from the slope of the linear part from the forward lnJ-V characteristics. The barrier height was calculated once the saturation current density was derived from the straight line intercept of lnJ-V plot at a zero voltage. The obtained results exhibit an increase of ideality factor and a decrease of barrier height at low temperatures, which might be owing to inhomogeneity of material and non-uniformity of charge at the interface. Based on Cheungs method, the ideality factor and barrier height were estimated from y-axis intercept of dV/d (lnJ)J plot and y-axis intercept of H(J)J plot, respectively. The series resistance was analyzed from the slopes of dV/d (lnJ)J and H(J)J plots. The values of ideality factor and barrier height obtained from this method are in agreement with those obtained from the thermionic emission theory. The obtained series resistances from dV/d (lnJ)J and H(J)J plots, which were approximately equal to each others, were increased as the temperature decreased. This result should be owing to the increased ideality factor and remarkably reduced carrier concentrations at low temperatures.

Current Transport Mechanism of n-Type Nanocrystalline FeSi2/Intrinsic Si/p-Type Si Heterojunctions Fabricated by Facing-Targets Direct-Current Sputtering

2013 ◽  
Vol 802 ◽  
pp. 199-203 ◽  
Author(s):  
Nathaporn Promros ◽  
Suguru Funasaki ◽  
Ryūhei Iwasaki ◽  
Tsuyoshi Yoshitake
Keyword(s):  
Ideality Factor ◽  
Low Temperatures ◽  
Transport Mechanism ◽  
Carrier Transport ◽  
Thermionic Emission ◽  
Current Transport ◽  
Current Transport Mechanism ◽  
Current Voltage ◽  
P Type ◽  
Direct Current Sputtering

n-Type nanocrystalline FeSi2/intrinsic Si/p-type Si heterojunctions were successfully fabricated by FTDCS and their forward current-voltage characteristics at low temperatures were analyzed on the basis of thermionic emission theory. The analysis of J-V characteristics exhibits an increase in the ideality factor and a decrease in the barrier height at low temperatures. The values of ideality factor were estimated to be 2.26 at 300 K and 9.29 at 77 K. The temperature dependent ideality factortogether with the constant value of parameter A indicated that a trap assisted multi-step tunneling process is the dominant carrier transport mechanism in this heterojunction. At high voltages, the current transport mechanism is dominated by SCLC process.

Temperature Dependent Current-Voltage Characteristics of n-Type β-FeSi2/Intrinsic Si/p-Type Si Heterojunctions

2015 ◽  
Vol 1120-1121 ◽  
pp. 435-439
Author(s):  
Nathaporn Promros ◽  
Dalin Prajakkan ◽  
Nantharat Hongsa ◽  
Nattanee Suthayanan ◽  
Phongsaphak Sittimart ◽  
...  
Keyword(s):  
Current Density ◽  
Ideality Factor ◽  
Series Resistance ◽  
Linear Part ◽  
Thermionic Emission ◽  
Saturation Current ◽  
Current Voltage ◽  
Saturation Current Density ◽  
Current Voltage Characteristics ◽  
P Type

In this work, n-type β-FeSi2/intrinsic Si/p-type Si heterojunctions were prepared by facing-targets direct-current sputtering. We measured their current-voltage characteristics at low temperatures ranging from 300 K down to 50 K and investigated their ideality factor, saturation current and series resistance using thermionic emission theory and Cheung’s method. From thermionic emission theory, the ideality factor and saturation current density were calculated from the slope of the linear part from the forward lnJ-V and the straight line intercept of lnJ-V at zero voltage, respectively. When the temperature decreased from 300 K down to 50 K, the ideality factor increased from 1.12 to 11.13, whereas the saturation current density decreased from 2.09 × 10-6 A/cm2 to 1.06 × 10-9 A/cm2. Using Cheung’s method, we plotted the relations of dV/d(lnJ)-J and H(J)-J in order to estimate the series resistance from the slope of both plots. In addition, we estimated the ideality factor from a y-axis intercept of the dV/d(lnJ)-J plot. The series resistances from both plots were consistent with each other and increased with the decreasing temperature. The ideality factor estimated by Cheung’s method was in agreement with that obtained from estimation by thermionic emission theory.

Temperature Dependent Current-Voltage Characteristics of n-Type Nanocrystalline-FeSi2/p-Type Si Heterojunctions Fabricated by Pulsed Laser Deposition

2013 ◽  
Vol 858 ◽  
pp. 171-176
Author(s):  
Nathaporn Promros ◽  
Ryūhei Iwasaki ◽  
Suguru Funasaki ◽  
Kyohei Yamashita ◽  
Chen Li ◽  
...  
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Carrier Transport ◽  
Series Resistance ◽  
Thermionic Emission ◽  
Temperature Dependent ◽  
Zero Bias ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
P Type

n-Type NC-FeSi2/p-type Si heterojunctions were successfully fabricated by PLD, and their forward current-voltage characteristics were analyzed on the basis of thermionic emission theory (TE) in the temperature range from 300 down to 77 K. With a decrease in the temperature, the ideality factor was increased while the zero-bias barrier height was decreased. The calculated values of ideality factor and barrier height were 3.07 and 0.63 eV at 300 K and 10.75 and 0.23 eV at 77 K. The large value of ideality factor indicated that a tunneling process contributes to the carrier transport mechanisms in the NC-FeSi2 films. The series resistance, which was estimated by Cheungs method, was strongly dependent on temperature. At 300 K, the value of series resistance was 12.44 Ω and it was dramatically enhanced to be 1.71× 105 Ω at 77 K.

Investigation of carrier transport mechanisms in the Cu–Zn–Se based hetero-structure grown by sputtering technique

2018 ◽  
Vol 96 (7) ◽  
pp. 816-825 ◽  
Author(s):  
H.H. Güllü ◽  
M. Terlemezoğlu ◽  
Ö. Bayraklı ◽  
D.E. Yıldız ◽  
M. Parlak
Keyword(s):  
Barrier Height ◽  
Carrier Transport ◽  
Thermionic Emission ◽  
Electrical Characterization ◽  
Band Gap Energy ◽  
Zero Bias ◽  
Hetero Structure ◽  
Current Voltage ◽  
P Type

In this paper, we present results of the electrical characterization of n-Si/p-Cu–Zn–Se hetero-structure. Sputtered film was found in Se-rich behavior with tetragonal polycrystalline nature along with (112) preferred orientation. The band gap energy for direct optical transitions was obtained as 2.65 eV. The results of the conductivity measurements indicated p-type behavior and carrier transport mechanism was modelled according to thermionic emission theory. Detailed electrical characterization of this structure was carried out with the help of temperature-dependent current–voltage measurements in the temperature range of 220–360 K, room temperature, and frequency-dependent capacitance–voltage and conductance-voltage measurements. The anomaly in current–voltage characteristics was related to barrier height inhomogeneity at the interface and modified by the assumption of Gaussian distribution of barrier height, in which mean barrier height and standard deviation at zero bias were found as 2.11 and 0.24 eV, respectively. Moreover, Richardson constant value was determined as 141.95 Acm−2K−2 by means of modified Richardson plot.

Laterally Inhomogeneous Barrier Height Analysis for Thermally Annealed CuNiTi/p-InP Contacts

2017 ◽  
Vol 890 ◽  
pp. 127-130
Author(s):  
Bahattin Abay
Keyword(s):  
Barrier Height ◽  
Thermal Annealing ◽  
Ideality Factor ◽  
Forward Bias ◽  
Thermionic Emission ◽  
Characteristic Parameters ◽  
Inp Substrate ◽  
Current Voltage ◽  
Positively Charged ◽  
Device Technology

The fabrication of thermally stable Schottky contacts with high barrier height (BH) to InP is one of the main challenges for InP-based device technology. CuNiTi/p-InP Schottky barrier diodes (SBDs) (25 dots) on p-InP substrate were fabricated by conventional vacuum deposition. Characteristic parameters such as BH and ideality factor (n) of as-deposited and annealed CuNiTi/p-InP diodes have been computed by thermionic emission (TE) theory from the forward-bias current-voltage (I-V) data, at room temperature and in dark. The value of BH and n varies from 0.452 to 0.631 eV and 1.172 to 2.815, respectively for the as-deposited SBDs. The results showed that characteristic parameters of CuNiTi/p-InP structures differ from one device to another even though they were identically prepared. Hence, to overcome these problems post thermal annealing was implemented since the annealing process can improve the interfacial quality as well as can induce a recrystallization of the gate metals. BH values for CuNiTi/p-InP SBDs have also varied from 0.765 to 0.804 eV, and ideality factor n from 1.161 to 1.253 after annealing at 500 °C for two minutes. As a result of the thermal annealing, it has been seen that the BH values of the annealed SBDs are larger than those of the as-deposited ones. A statistical study on the diode parameters has been made. The experimental BH and ideality factor distributions were fitted by a Gaussian distribution (GD) function. Lateral homogeneous BH (φhom.) values of 0.628 eV and 0.886 eV for the as-deposited and annealed CuNiTi/p-InP SBDs has been obtained from the φeff.-n plots by using Tung’s lateral inhomogeneity approach. An increment of 0.258 eV in the BH for the 500 °C annealing devices with respect to that of the as-deposited ones has been ascribed to the formation of the positively charged interface defects that electrically actives in the metal-semiconductor (MS) interface.

Electrical Study of Schottky Barriers on Cleaved InP and GaAs (110) Surfaces

1985 ◽  
Vol 54 ◽  
Author(s):  
N. Newman ◽  
M. van Schilfgaarde ◽  
T. Kendelewicz ◽  
W. E. Spicer
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
High Vacuum ◽  
Forward Bias ◽  
Thermionic Emission ◽  
Ultra High Vacuum ◽  
Leakage Currents ◽  
Current Voltage ◽  
Measuring Techniques

We have performed a systematic study of the electrical properties of a large number of metal/n-GaAs and metal/n-InP diodes. Diodes were fabricated on clean cleaved InP and GaAs (110) surfaces in ultra-high vacuum with in-situ metal deposition of Cr, Mn, Sn, Ni, Al, Pd, Cu, Ag and Au. Using current-voltage (I-V) and capacitance-voltage (C-V) measuring techniques, we were able to obtain very reliable and consistent determinations of the barrier height, θ/b, and ideality factor, n. All of the metal-semiconductor systems formed on lightly doped (< 5×1016/cm3) substrates were characterized by near-unity (1.05) ideality factors.The effects of doping on the electrical characteristics of the n-GaAs diodes were investigated. A decrease in the effective I-V barrier height, an increase in the ideality factor in forward bias and a strong voltage dependence on the thermionic emission currents in reverse bias were found for diodes formed on the more heavily doped samples. These changes are essentially metal-independent, but depend strongly on the doping of the substrate. The characterization (and elimination in some cases) of peripheral leakage currents from the thermionic emission current for the n-GaAs systems was found to be essential in obtaining consistent results in our work and in reinterpreting some of the prior work in the literature. The dominant leakage current in the GaAs diodes flows through a small area, low barrier at the periphery of the device and can be eliminated by mesa etching.

THE EFFECT OF NANO AND MICRO POROSITY ON THE SCHOTTKY BARRIER HEIGHT AND IDEALITY FACTOR IN THE I–V CHARACTERISTICS OF PtSi/p-Si IR DETECTOR

2009 ◽  
Vol 23 (05) ◽  
pp. 765-771
Author(s):  
H. ESHGHI ◽  
M. MOHAMMADI
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Ideality Factor ◽  
Schottky Barrier Height ◽  
Thermionic Emission ◽  
Ir Detector ◽  
Current Voltage ◽  
Two Samples ◽  
P Type ◽  
Silicon Interface

In this paper, the effect of porosity on reverse bias current–voltage characteristics of PtSi/por - Si (p-type) IR detector as a function of temperature is investigated. Our experimental data for two samples with different porosities (50% and 10%) at 300 K and 77 K are reported by Raissi et al.1 These data indicates a breakdown-like behavior. Our analytical model is based on hole thermionic emission with large ideality factor (n ≈ 200). Our calculations show that at each temperature, the Schottky barrier height, as well as the ideality factor, in sample with 10% porosity is bigger than that of 50%. These variations could be due to band gap variations of Si size effect using quantum dot model, and the presence of the relatively high (~1015 cm-2 eV-1) density of states at the silicide/por-silicon interface, respectively.

Diode Parameters of Mesa Structural n-Type Nanocrystalline FeSi2/p-Type Si Heterojunctions Prepared by Lift-Off Photolithography

2015 ◽  
Vol 1103 ◽  
pp. 91-96
Author(s):  
Nathaporn Promros ◽  
Suguru Funasaki ◽  
Motoki Takahara ◽  
Ryūhei Iwasaki ◽  
Mahmoud Shaban ◽  
...  
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Low Temperatures ◽  
Series Resistance ◽  
Thermionic Emission ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Lift Off ◽  
P Type ◽  
Photolithography Process

Mesa structural n-type nanocrystalline-FeSi2/p-type Si heterojunctions were successfully fabricated by a lift-off technique combined with a photolithography process. Their current-voltage characteristics were measured at low temperatures range from 300 K down to 60 K. We estimated their diode parameters such as ideality factor, barrier height and series resistance based on the thermionic emission theory and Cheung’s method. From the estimation by the thermionic emission theory, the obtained results show an increase of ideality factor and a decrease of barrier height at low temperatures. The estimation by Cheung’s method shows that the values of ideality factor and barrier height are in agreement with those obtained from the thermionic emission theory. The obtained series resistances from dV/d (lnJ)-J and H(J)-J plots, which are approximately equal to each others, are increased at low temperatures.

Sign in / Sign up

Export Citation Format

Share Document