Design of Virtual Oscilloscope Based on S3C2410

2011 ◽  
Vol 189-193 ◽  
pp. 227-230
Author(s):  
Shu Lin Shi ◽  
Guo Rui Pi
Keyword(s):  
Embedded System ◽  
Real Time ◽  
High Speed ◽  
Data Exchange ◽  
Control Logic ◽  
Real Time Processing ◽  
High Speed Data ◽  
The Common ◽  
The Embedded System ◽  
The Cost

: This topic has designed a kind of virtual oscilloscope based on the embedded technical. On the hardware the S3C2410+IDT7204 structure were used, on the software real-time operating system uC/OS-II were used in the design of embedded virtual oscilloscope. ARM9 microprocessor's high speed handling ability are fully used, as well as FIFO in the read-write control logic, the superiority in high speed data exchange aspect, realizes the double channel synchronization profile demonstration. the multi-task run and the real-time processing were realized by using on the uC/OS-II operating system's in ARM9 microprocessor transplant. This oscilloscope has the cost lowly, to be possible to as the common oscilloscope, also to be possible to as an intelligent module the merit which used in the embedded system.

Real-Time Processing for High Speed Data Stream over Large Scale Data

2012 ◽  
Vol 35 (3) ◽  
pp. 477-490 ◽  
Author(s):  
Kai-Yuan QI ◽  
Zhuo-Feng ZHAO ◽  
Jun FANG ◽  
Qiang MA
Keyword(s):  
Real Time ◽  
Data Stream ◽  
High Speed ◽  
Large Scale ◽  
Real Time Processing ◽  
Time Processing ◽  
Large Scale Data ◽  
High Speed Data ◽  
Scale Data

Data Acquisition System Based on uC/OS-III Embedded System

2012 ◽  
Vol 619 ◽  
pp. 85-89 ◽  
Author(s):  
Wen Hua Li ◽  
Jin Yu Zheng ◽  
Chen Yu
Keyword(s):  
Embedded System ◽  
Data Acquisition ◽  
Real Time ◽  
High Speed ◽  
Modular Design ◽  
Embedded Operating System ◽  
Collection System ◽  
High Speed Data Acquisition ◽  
High Speed Data ◽  
Design Ideas

This paper presents a data collection system based on C8051F040 processor and real-time embedded operating system uC/OS-III. The hardware part design, uC/OS-III transplant process and notes, system processes are discussed in detail. This system takes the modular design ideas and reasonable task-assigned strategy, make software is easy to code and modify, realizes real-time, high speed data acquisition.

scholarly journals A real-time photogrammetry system based on embedded architecture

2014 ◽  
Vol XL-5 ◽  
pp. 633-638
Author(s):  
S. Y. Zheng ◽  
L. Gui ◽  
X. N. Wang ◽  
D. Ma
Keyword(s):  
Data Processing ◽  
Embedded System ◽  
Real Time ◽  
Spatial Data ◽  
High Speed ◽  
Embedded Computing ◽  
Processing Efficiency ◽  
Online Processing ◽  
Embedded Architecture ◽  
The Embedded System

In order to meet the demand of real-time spatial data processing and improve the online processing capability of photogrammetric system, a kind of real-time photogrammetry method is proposed in this paper. According to the proposed method, system based on embedded architecture is then designed: using FPGA, ARM+DSP and other embedded computing technology to build specialized hardware operating environment, transplanting and optimizing the existing photogrammetric algorithm to the embedded system, and finally real-time photogrammetric data processing is realized. At last, aerial photogrammetric experiment shows that the method can achieve high-speed and stable on-line processing of photogrammetric data. And the experiment also verifies the feasibility of the proposed real-time photogrammetric system based on embedded architecture. It is the first time to realize real-time aerial photogrammetric system, which can improve the online processing efficiency of photogrammetry to a higher level and broaden the application field of photogrammetry.

ANALISA PERBANDINGAN DALAM RANGKA PEMILIHAN BEBERAPA IP UPSTREAM PROVIDER DI PT. INDOSAT

2018 ◽  
Vol 4 (1) ◽  
pp. 57
Author(s):  
Yuli Anwar ◽  
Dahlar .
Keyword(s):  
Business Strategy ◽  
High Speed ◽  
Human Life ◽  
Sustainable Growth ◽  
The Internet ◽  
Network Service Provider ◽  
High Speed Data ◽  
Telecommunications Services ◽  
The Cost ◽  
Internet Network

Abstract. One of the advances in information technology that now has changed the outlook and human life, business process and business strategy of an institution is the internet. The internet is a very large networks that connected to computers and serves throughout the world in one centralized network. With the internet we can access data and information anytime and anywhere.    As one provider of high-speed data communications services and the pioneer of the internet network service provider in Indonesia that provides integrated services, as well as one of the pioneer development of internet services that provide extensive services in the building and apply it throughout Indonesia. Indosat ready to seize opportunities for sustainable growth of business spectrum are still sprawling Indonesia.    Therefore, Indosat continues to focus on the development of increased efforts to provide the best service for customers of Indosat. Indosat will continue to develop and expand network coverage and a larger investment that the company will achieve excellence in the field of integrated telecommunications services.    Ranking by region of the IP Providers can be seen by grouping IP Providers, and management over IP Providers prefer to choose providers based on where it orginates as an example for the region of the U.S if it will be preferred providers that come from U.S. providers.With the commencement of the internet network optimization start early in 2008 with the selection of the appropriate IP Upstream Provider criteria, it is up to date according to data obtained from Indosat, seen any significant changes to the cost of purchasing capacity of the IP Upstream.    Based on the data obtained that until Q3 or September 2008, the number of IP Upstream Providers that previously there were 20 to 10 IP Upstream Provider, IP Transit Price total decrease of 11% to the price of IP Transit Price / Mbps there is a decrease of 78%, while from the capacity bandwith an increase of 301% capacity from 2008.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

Research on Control Power and Self-Sensing Technology for GMM Self-Sensing Actuator

2010 ◽  
Vol 34-35 ◽  
pp. 1314-1318
Author(s):  
Xin Hua Wang ◽  
Shou Qiang Hu ◽  
Qian Yi Ya ◽  
Shu Wen Sun ◽  
Xiu Xia Cao
Keyword(s):  
Real Time ◽  
High Speed ◽  
Dynamic Balance ◽  
The Self ◽  
Time Dynamic ◽  
Scheme Design ◽  
Control Power ◽  
Sensing Technology ◽  
The Cost ◽  
Micro Controller Unit

Structure and principle of a new kind of diphase opposition giant magnetostrictive self-sensing actuator (SSA for short) is introduced, for which a kind of double outputs high-precision NC stable voltage power is designed. With the method of combining with the hardware design and the software setting, the controllability and reliability of the actuator are greatly improved. And the whole design becomes more reasonable, which saves the cost and improves the practicability. In addition, based on the micro controller unit (MCU) with high-speed control, the scheme design of the real-time separation circuit for dynamic balance signal can effectively identify out and pick up the self-sensing signal which changes from foreign pressure feed back. Then the SSA real-time, dynamic and accurately control is realized. The experiment results show that the voltage power can high-speed and accurately output both output voltages with high current, and that the self-sensing signal decoupling circuit can isolate the self-sensing signals without distortion

scholarly journals SoC-FPGA systems for the acquisition and processing of electroencephalographic signals

2021 ◽  
Vol 10 (3) ◽  
pp. 237
Author(s):  
Matias Javier Oliva ◽  
Pablo Andrés García ◽  
Enrique Mario Spinelli ◽  
Alejandro Luis Veiga
Keyword(s):  
Embedded System ◽  
Real Time ◽  
General Purpose ◽  
System Response ◽  
Single Chip ◽  
Real Time Processing ◽  
General Purpose Processor ◽  
Time Operation ◽  
Electroencephalographic Signals ◽  
High Level

<span lang="EN-US">Real-time acquisition and processing of electroencephalographic signals have promising applications in the implementation of brain-computer interfaces. These devices allow the user to control a device without performing motor actions, and are usually made up of a biopotential acquisition stage and a personal computer (PC). This structure is very flexible and appropriate for research, but for final users it is necessary to migrate to an embedded system, eliminating the PC from the scheme. The strict real-time processing requirements of such systems justify the choice of a system on a chip field-programmable gate arrays (SoC-FPGA) for its implementation. This article proposes a platform for the acquisition and processing of electroencephalographic signals using this type of device, which combines the parallelism and speed capabilities of an FPGA with the simplicity of a general-purpose processor on a single chip. In this scheme, the FPGA is in charge of the real-time operation, acquiring and processing the signals, while the processor solves the high-level tasks, with the interconnection between processing elements solved by buses integrated into the chip. The proposed scheme was used to implement a brain-computer interface based on steady-state visual evoked potentials, which was used to command a speller. The first tests of the system show that a selection time of 5 seconds per command can be achieved. The time delay between the user’s selection and the system response has been estimated at 343 µs.</span>

Portable Wireless Yield Monitoring System on Conventional Rice Combine

2021 ◽  
Vol 37 (1) ◽  
pp. 193-203
Author(s):  
Renny Eka Purti ◽  
Azmi Yahya ◽  
Oh Yun Ju ◽  
Maryam Mohd Isa ◽  
Samsuzana Abdul Aziz
Keyword(s):  
Moisture Content ◽  
Embedded System ◽  
Real Time ◽  
Crop Yield ◽  
Field Capacity ◽  
Base Station ◽  
Grain Moisture ◽  
The Embedded System ◽  
Yield Monitoring ◽  
Grain Elevator

Abstract. A simple, portable, and rugged instrumentation system has been successfully developed and field demonstrated to monitor, measure, and record the harvested crop yield and selected machine field performance parameters from the typical rice combines in Malaysia. The complete system comprises of two ultrasonic sensors located at the combine header to measure the cutting width, microwave solid flow, and microwave moisture sensors at the combine clean grain auger to measure the flow rate and moisture content of the cleaned grains going into the grain tank, electromagnetic detector on the combine grain elevator drive shaft to monitor the grain elevator rotational speed, and lastly a DGPS receiver on the combine console roof to indicate the travel speed and geo-position in the field. All these measured parameters were made to display in-real time on the touch panel screen of the embedded system on-board the combine for the interest of the combine operator and also made to display in-real time on the monitor of the toughbook at the on-ground base station for the interest of the system controller. Static calibrations on the individual sensors showed excellent measurement linearity having R2 values within 0.8760 to 1.000 ranges. The wireless communication between the embedded system on-board the combine and the toughbook at the on-ground base station could be sustained to a maximum distance of 185 m apart. Site specific variability maps of crop yield, harvested grain moisture content, combine cutting width, combine traveling speed, combine field capacity, and combine field efficiency within the harvested area could be produced from the data obtained with the instrumentation system using a GIS software. Keywords: Grain harvesting, Paddy mechanization, Precision farming, Wireless data transmission, Yield monitoring.

Sign in / Sign up

Export Citation Format

Share Document