SXRT Investigations on Electrically Stressed 4H-SiC PiN Diodes for 6.5 kV

4H-SiC PiN diodes for 6.5 kV were manufactured on both 4° and 8° off-cut substrates and subjected to an electrical stress test on wafer level and subsequent analysis of structural defects present in the active area of the diodes. For 8° off-cut diodes, the electrical characteristics with respect to leakage current and forward voltage drift are worse than the electrical characteristics of 4° off-cut diodes. Furthermore, a large number of stacking faults was found in 8° off-cut diodes, but little evidence for bipolar degradation was found in 4° off-cut diodes. Therefore, bipolar degradation was significantly reduced by avoiding BPDs in the active area of PiN diodes, i.e. by the use of 4° off-cut substrates. Furthermore, a strong correlation was found between the electrical screening test on wafer level and critical defects.

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Optical Stressing of 4H-SiC Material and Devices

Materials Science Forum ◽

10.4028/www.scientific.net/msf.924.196 ◽

2018 ◽

Vol 924 ◽

pp. 196-199 ◽

Cited By ~ 1

Author(s):

Birgit Kallinger ◽

Daniel Kaminzky ◽

Patrick Berwian ◽

Jochen Friedrich ◽

Steffen Oppel

Keyword(s):

Stress Test ◽

Stacking Faults ◽

Base Material ◽

Structural Defects ◽

Reliability Testing ◽

Uv Laser ◽

Stress Tests ◽

Wafer Level ◽

Electrical Stress ◽

Established Technique

Electrical testing with regard to bipolar degradation of high voltage SiC devices cannot be done on wafer level, but only expensively after module assembly. We show that 4H-SiC material can be optically stressed by applying high UV laser intensities, i.e. bipolar degradation as in electrical stress tests can be provoked on wafer level. Therefore, optical stressing can be used for control measurements and reliability testing. Different injection (=stress) levels have been used similar to the typical doping level of the base material and similar to the established electrical stress test. The analysis of degradation is done by photoluminescence imaging which is a well-established technique for revealing structural defects such as Basal Plane Dislocations (BPDs) and stacking faults (SFs) in 4H-SiC epiwafers and partially processed devices.

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Effect of Stacking Faults Originating from Half Loop Arrays on Electrical Behavior of 10 kV 4H-SiC PiN Diodes

Materials Science Forum ◽

10.4028/www.scientific.net/msf.717-720.387 ◽

2012 ◽

Vol 717-720 ◽

pp. 387-390 ◽

Cited By ~ 10

Author(s):

Robert E. Stahlbush ◽

Qing Chun Jon Zhang ◽

Anant K. Agarwal ◽

Nadeemullah A. Mahadik

Keyword(s):

Basal Plane ◽

Forward Bias ◽

Stacking Faults ◽

Device Fabrication ◽

Electrical Behavior ◽

Forward Voltage ◽

Pin Diodes ◽

Electrical Stress ◽

Half Loop

The effects of Shockley stacking faults (SSFs) that originate from half loop arrays (HLAs) on the forward voltage and reverse leakage were measured in 10 kV 4H-SiC PiN diodes. The presence of HLAs and basal plane dislocations in each diode in a wafer was determined by ultraviolet photoluminescence imaging of the wafer before device fabrication. The SSFs were expanded by electrical stressing under forward bias of 30 A/cm2, and contracted by annealing at 550 °C. The electrical stress increased both the forward voltage and reverse leakage. Annealing returned the forward voltage and reverse leakage to nearly their original behavior. The details of SSF expansion and contraction from a HLA and the effects on the electrical behavior of the PiN diodes are discussed.

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Study of Forward Voltage Drift in Diffused SiC PiN Diodes Doped by Al or B

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.989 ◽

2005 ◽

Vol 483-485 ◽

pp. 989-992 ◽

Cited By ~ 1

Author(s):

S.I. Maximenko ◽

Stanislav I. Soloviev ◽

A.E. Grekov ◽

A.V. Bolotnikov ◽

Ying Gao ◽

...

Keyword(s):

Current Density ◽

Room Temperature ◽

Stacking Faults ◽

Applied Current ◽

Forward Voltage ◽

Pin Diodes ◽

Applied Current Density ◽

Voltage Drift ◽

Significant Change ◽

Degradation Testing

The degradation of diffused SiC PIN diodes during forward-biased operation was studied by first fabricating PIN diodes by diffusion of aluminum or boron into 4H-SiC substrates with n-type 10-15 µm thick epilayers doped by nitrogen up to 5x1015cm-3. The formed diodes were subjected to degradation testing under an applied current density of 200A/cm2 at room temperature. The majority of the Al diffused diodes demonstrated a voltage drift, ΔVf, of more than 2 V, while B-doped diodes showed no significant change in forward voltage. The EBIC mode of SEM was employed to monitor nucleation and expansion of stacking faults.

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Influence of in-Grown Stacking Faults on Electrical Characteristics of 4H-SiC Pin Diode with Long Carrier Lifetime

Materials Science Forum ◽

10.4028/www.scientific.net/msf.740-742.903 ◽

2013 ◽

Vol 740-742 ◽

pp. 903-906 ◽

Cited By ~ 5

Author(s):

Koji Nakayama ◽

Atsushi Tanaka ◽

Katsunori Asano ◽

Tetsuya Miyazawa ◽

Hidekazu Tsuchida

Keyword(s):

Room Temperature ◽

Carrier Lifetime ◽

Stacking Faults ◽

Pin Diode ◽

Electrical Characteristics ◽

Forward Voltage ◽

Pin Diodes ◽

Voltage Drops ◽

Implantation Process ◽

Drift Layer

The electrical characteristics of 4H-SiC pin diodes with 8H-type in-grown stacking faults are investigated. The pin diodes have epilayers with low Z1/2center concentration formed by using the carbon implantation process. The forward voltage drops of the diode with 8H-type in-grown stacking faults are larger than those of the diode without a 8H-type in-grown stacking fault. At room temperature, the differential on-resistance of the pin diode with 8H-type in-grown stacking faults is larger than the value calculated from donor concentration in the drift layer by using the current transportation model of the unipolar device. Meanwhile, the differential on-resistances of the pin diode with 8H-type in-grown stacking faults decrease with an increase in temperature and become smaller than the calculated value at temperature of more than 200 °C.

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Study of Forward Voltage Drift in Diffused SiC PiN Diodes Doped by Al or B

Materials Science Forum - Silicon Carbide and Related Materials 2004 ◽

10.4028/0-87849-963-6.989 ◽

2005 ◽

pp. 989-992

Author(s):

S.I. Maximenko ◽

Stanislav Soloviev ◽

A.E. Grekov ◽

A. Bolotnikov ◽

Ying Gao ◽

...

Keyword(s):

Forward Voltage ◽

Pin Diodes ◽

Voltage Drift

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Single Shockley Stacking Faults in As-Grown 4H-SiC Epilayers

Materials Science Forum ◽

10.4028/www.scientific.net/msf.645-648.327 ◽

2010 ◽

Vol 645-648 ◽

pp. 327-330 ◽

Cited By ~ 2

Author(s):

Jawad ul Hassan ◽

Peder Bergman

Keyword(s):

Temperature Dependence ◽

Optical Microscopy ◽

Optical Spectrum ◽

Carrier Lifetime ◽

Geometrical Structure ◽

Stacking Faults ◽

Stacking Fault ◽

Structural Defects ◽

Forward Voltage ◽

Substrate Interface

An extended structural defects which locally drastically reduces the carrier lifetime, has been observed in as-grown epilayers. A combination of back polishing, etching in molten KOH and optical microscopy revealed the geometrical structure of the stacking fault inside the epilayer. The fault started close to the epi-substrate interface, expanded initially rapidly but changed geometry after some time and reduced in size during further growth. The optical spectrum as well as the temperature dependence from this fault is identical to the emission from the single Shockley stacking faults previously only observed and formed in the bipolar diodes during forward voltage operation.

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Recombination Model at Perimeter of Stacking Faults in 4H-SiC pin Diode with Forward Voltage Drift

10.7567/ssdm.2010.i-4-2 ◽

2010 ◽

Author(s):

K. Nakayama ◽

Y. Sugawara ◽

H. Tsuchida ◽

C. Kimura ◽

H. Aoki

Keyword(s):

Stacking Faults ◽

Pin Diode ◽

Forward Voltage ◽

Recombination Model ◽

Voltage Drift

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Characterisation of 4H-SiC PiN Diodes by Micro-Raman Scattering and Photoemission

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.437 ◽

2005 ◽

Vol 483-485 ◽

pp. 437-440 ◽

Cited By ~ 1

Author(s):

Aurelie Thuaire ◽

Michel Mermoux ◽

Alexandre Crisci ◽

Nicolas Camara ◽

Edwige Bano ◽

...

Keyword(s):

Residual Stress ◽

Raman Scattering ◽

Temperature Increase ◽

Stacking Faults ◽

Structural Defects ◽

Pin Diodes ◽

Characterization Techniques ◽

Set Up

Structural defects in SiC crystals were investigated and 4H-SiC pin devices were characterized by micro-Raman scattering and photoemission. With the experimental set-up presented, defects could be successfully detected in SiC crystals but stacking faults could not be detected with micro-Raman scattering, although they could be detected by photoemission. Residual stress could be evaluated in 4H-SiC devices, as well as the temperature increase associated with the devices powering. A good correlation was found between the characterization techniques used: micro-Raman scattering and photoemission.

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Improved SiC Epitaxial Material for Bipolar Applications

MRS Proceedings ◽

10.1557/proc-1069-d05-01 ◽

2008 ◽

Vol 1069 ◽

Cited By ~ 1

Author(s):

Peder Bergman ◽

Jawad ul Hassan ◽

Alex Ellison ◽

Anne Henry ◽

Philippe Godignon ◽

...

Keyword(s):

Growth Parameters ◽

Surface Preparation ◽

Chemical Vapor ◽

Vital Role ◽

Structural Defects ◽

Growth Mechanisms ◽

Forward Voltage ◽

Voltage Drift ◽

Basal Plane Dislocation

ABSTRACTEpitaxial growth on Si-face nominally on-axis 4H-SiC substrates has been performed using horizontal Hot-wall chemical vapor deposition system. The formation of 3C inclusions is one of the main problem with growth on on-axis Si-face substrates. In situ surface preparation, starting growth parameters and growth temperature are found to play a vital role in the epilayer polytype stability. High quality epilayers with 100% 4H-SiC were obtained on full 2″ substrates. Different optical and structural techniques were used to characterize the material and to understand the growth mechanisms. It was found that the replication of the basal plane dislocation from the substrate into the epilayer can be eliminated through growth on on-axis substrates. Also, no other kind of structural defects were found in the grown epilayers. These layers have also been processed for simple PiN structures to observe any bipolar degradation. More than 70% of the diodes showed no forward voltage drift during 30 min operation at 100 A/cm2.

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