Plating Opportunities in 3D

Through Silicon Via's (TSV) are one of the key enabling technologies towards 3D packaging. Copper electroplating is frequently mentioned as candidate to fill TSV's besides polySi or ink-jetting conductive inks and attracts high attention. In addition to copper plating solder plating offers the next opportunity. Last but not least the ultimate target of an “all wet TSV” where also barrier and seed layers are electroplated, was demonstrated already. This paper targets to introduce the 3D related plating technologies and will encourage a discussion about targets to be meet in order to enable 3D. Even so copper plating is well introduced to the IC industry for Dual Damascene plating, TSV copper filling challenges the plating technology. One of the reasons why is that TSV dimensions are almost one magnitude larger than dual damascene structures. So in order to meet the industries target of fast and void free copper filling, type and function of organic additives applied in copper plating bathes need to be re investigated. Galvanic copper electrolytes contain three organic additives. Carrier is a mild plating suppressor, Brightener is an accelerator, and Leveler is a strong suppressor and locally deactivates the Brightener. The Leveler component mainly affects the properties of the copper deposits. This paper will give an overview about type and role of organic additives used for TSV application. We will also discuss how namely the Leveler controls the filling mechanism and copper deposit properties. Two different acidic copper systems were used for TSV-filling. System A shows a super-conformal filling behavior and different copper grain structures at the surface compared to the TSV body. System B shows a bottom-up filling with similar copper grain structure at surface and TSV body. Both systems vary further regarding stress of the copper deposits, recrystallization temperature, incorporation of additives, and coefficient of thermal expansion. The paper discusses the influence of organic copper additives to the mechanical, thermal, and electrical properties of the copper deposits. Even so process technology to fill TSV's is still fast progressing we like to give a snapshot of fill times per TSV dimension reached using System B. Other potential plating applications in 3D stacking are eventually plating solder and/or diffusion barriers. This paper intends to introduce the basic principles of electrochemical and electroless plating and give application examples for Tin and Nickel/Palladium electroless plated layers applied for 3D packaging applications. Last but not least the concept of “all wet TSV” appears in the literature, targeting to substitute the barrier and seed layer so fare deposited by vacuum deposition technology by plating technologies. We will shortly review the literature and will introduce work currently under progress in Atotech towards an “all wet TSV”.