Background:
With the increase of the integration degree of the three-dimensional integrated circuit(3D IC), the thermal power consumption per unit volume increases greatly, which makes the chip temperature rise. High temperature could affect the performance of the devices and even lead to thermal failure. So, the thermal management for 3D ICs is becoming a major concern.
Objective:
The aim of the research is to establish a micro-channel cooling model for a three-dimensional integrated circuit(3D IC) considering the through-silicon vias(TSVs).
Methods:
By studying the structure of the TSVs, the equivalent thermal resistance of each layer is formulated. Then the one-dimensional micro-channel cooling thermal analytical model considering the TSVs was proposed and solved by the existing sparse solvers such as KLU.
Results:
The results obtained in this paper reveal that the TSVs can effectively improve the heat dissipation, and its maximal temperature reduction is about 10.75%. The theoretical analysis is helpful to optimize the micro-channel cooling system for 3D ICs.
Conclusion:
The TSV has an important influence on the heat dissipation of 3D IC, which can improve its heat dissipation characteristic
Vernier ring based pre-bond through silicon vias test in 3D ICs