Numerical Model of Current Flow and Thermal Phenomena in Lateral GaN/InGaN LEDs

GaN-based light-emitting diodes (LEDs) became one of the most widely used light sources. One of their key factors is power conversion efficiency; hence, a lot of effort is placed on research to improve this parameter, either experimentally or numerically. Standard approaches involve device-oriented or system-oriented methods. Combining them is possible only with the aid of compact, lumped parameter models. In the paper, we present a new electro-thermal model that covers all the complex opto-electro-thermal phenomena occurring within the operating LED. It is a simple and low computational cost solution that can be integrated with package- or system-oriented numerical analysis. It allows a parametric analysis of the diode structure and properties under steady-state operating conditions. Its usefulness has been proved by conducting simulations of a sample lateral GaN/InGaN LED with the aid of ANSYS software. The results presented illustrate the current density and temperature fields. They allow the identification of ‘hot spots’ resulting from the current crowding effect and can be used to optimise the structure.

A comprehensive study of current-crowding effect in high power vertical AlInGaN LEDs under high pulsed current

The goal of the study is examination of current-crowding effect in high power AlInGaN LEDs. This effect was presented by mapping of EL (electroluminescence) near filed under high pulse current. LED chip of vertical design was study in high range of current (10−9 ÷ 70A). This operating mode of LEDs are interesting for different applications, such as pumping lasers, VLC and LiFi, as well as for investigation accelerated degradation process of LEDs.

Micro-features of ambipolar snapback behaviour under high current injection to design capacitorless memory device

This paper presents micro-features of capacitorless memory cells based on snapback phenomenon and modeling of space-charges. 2—Dimensional gate grounded NMOS structure is specified and its operational window of the memory cell is inspected using the Synopsys TCAD tool. This work examines snapback behaviour in one transistor DRAM memory cell in the absence of a storage capacitor under zero gate bias and applied ramp of high current at the drain terminal. Carrier electrostatics and memory cell mechanisms are also explored by adjusting the slope of the high current ramp. The process variation is examined for different parameters in the device. The current crowding phenomenon due to the injection of electrons and holes is investigated, giving rise to ambipolar behaviour. Due to the snapback, redistribution of electron and hole current is investigated. This work also evaluates the impact on electrostatic potential along channel and bulk under the snapback. It explains the dependency of snapback on potential build-up. Post-snapback electron current flipping presents the flow line near the gate region. The bipolar activity is manifested in surface and bulk regions to show its impact through analytics. The effect of gate biasing is also examined under the applied current ramp.

A study on the effects of electrical and thermal stresses on void formation and migration lifetime of Sn3.0Ag0.5Cu solder joints

Purpose The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder joints and to propose a modified mean-time-to-failure (MTTF) equation when joints are subjected to coupling stress. Design/methodology/approach The samples of the BGA package were subjected to a migration test at different currents and temperatures. Voltage variation was recorded for analysis. Scanning electron microscope and electron back-scattered diffraction were applied to achieve the micromorphological observations. Additionally, the experimental and simulation results were combined to fit the modified model parameters. Findings Voids appeared at the corner of the cathode. The resistance of the daisy chain increased. Two stages of resistance variation were confirmed. The crystal lattice orientation rotated and became consistent and ordered. Electrical and thermal stresses had an impact on the void formation. As the current density and temperature increased, the void increased. The lifetime of the solder joint decreased as the electrical and thermal stresses increased. A modified MTTF model was proposed and its parameters were confirmed by theoretical derivation and test data fitting. Originality/value This study focuses on the effects of coupling stress on the void formation of the SAC305 BGA solder joint. The microstructure and macroscopic performance were studied to identify the effects of different stresses with the use of a variety of analytical methods. The modified MTTF model was constructed for application to SAC305 BGA solder joints. It was found suitable for larger current densities and larger influences of Joule heating and for the welding ball structure with current crowding.

Electromigration Analysis of Solder Joints for Power Modules Using an Electrical-Thermal-Stress-Atomic Coupled Model

Numerical analysis of electromigration in solder joints has mainly examined ball grid arrays (BGAs) in flip-chip packages, and few numerical study has been reported on solder joints in power modules. This report describes an electromigration analysis of solder joints for power modules with a Si-based power device, which are still widely used today, using an electrical-thermal-stress-atomic coupled analysis. To evaluate electromigration, a solder joint with a power device and a substrate as used in power modules was simulated. Due to current crowding, the current density at the edge of the solder joint exceeded the electromigration threshold even in Si-based power modules. Unlike general electromigration phenomena, the vacancy concentration increased at the center and decreased at the edges of the solder joint, regardless of whether it was on the cathode side or anode side. The vacancy concentration clearly increased with increasing current density and size ratio. Creep strain increased significantly with increasing current density, temperature, and size ratio. The largest change in vacancy concentration and creep strain was at the anode edge where current crowding occurred. In addition, we modeled the two-dimensional behavior of metal atoms passing through the interface of the solder joint. The expansion of intermetallic compound was accelerated by increasing the temperature and current density.

Effect of Bonding Strength on Electromigration Failure in Cu–Cu Bumps

In microelectronic packaging technology for three-dimensional integrated circuits (3D ICs), Cu-to-Cu direct bonding appears to be the solution to solve the problems of Joule heating and electromigration (EM) in solder microbumps under 10 μm in diameter. However, EM will occur in Cu–Cu bumps when the current density is over 106 A/cm2. The surface, grain boundary, and the interface between the Cu and TiW adhesion layer are the three major diffusion paths in EM tests, and which one may lead to early failure is of interest. This study showed that bonding strength affects the outcome. First, if the bonding strength is not strong enough to sustain the thermal mismatch of materials during EM tests, the bonding interface will fracture and lead to an open circuit of early failure. Second, if the bonding strength can sustain the bonding structure, voids will form at the passivation contact area between the Cu–Cu bump and redistribution layer (RDL) due to current crowding. When the void grows along the passivation interface and separates the Cu–Cu bump and RDL, an open circuit can occur, especially when the current density and temperature are severe. Third, under excellent bonding, when the voids at the contact area between the Cu–Cu bump and RDL do not merge together, the EM lifetime can be more than 5000 h.

Improved Performance of GaN-Based Ultraviolet LEDs with the Stair-like Si-Doping n-GaN Structure

A method to improve the performance of ultraviolet light-emitting diodes (UV-LEDs) with stair-like Si-doping GaN layer is investigated. The high-resolution X-ray diffraction shows that the UV-LED with stair-like Si-doping GaN layer possesses better quality and a lower dislocation density. In addition, the experimental results demonstrate that light output power and wall plug efficiency of UV-LED with stair-like Si-doping GaN are significantly improved. Through the analysis of the experimental and simulation results, we can infer that there are two reasons for the improvement of photoelectric characteristics: reduction of dislocation density and alleviating of current crowding of UV-LEDs by introduced stair-like Si-doping GaN.