Modelling and Design of 5T, 6T and 7T SRAM Cell Using Deep Submicron CMOS Technology
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2017 ◽
Vol 10
(10)
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pp. 49-62
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2008 ◽
Vol 46
(9)
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pp. 154-161
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2012 ◽
Vol 47
(6)
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pp. 1394-1407
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2002 ◽
Vol 49
(9)
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pp. 1558-1565
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2009 ◽
Vol 40
(6)
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pp. 1007-1012
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