Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation

It is questionable whether DRAM will continue to scale and will meet the needs of next-generation systems. Therefore, significant effort is invested in research and development of novel memory technologies. One of the candidates for next-generation memory is Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM). STT-MRAM is an emerging non-volatile memory with a lot of potential that could be exploited for various requirements of different computing systems. Being a novel technology, STT-MRAM devices are already approaching DRAM in terms of capacity, frequency, and device size. Although STT-MRAM technology got significant attention of various major memory manufacturers, academic research of STT-MRAM main memory remains marginal. This is mainly due to the unavailability of publicly available detailed timing and current parameters of this novel technology, which are required to perform a reliable main memory simulation on performance and power estimation. This study demonstrates an approach to perform a cycle accurate simulation of STT-MRAM main memory, being the first to release detailed timing and current parameters of this technology from academia—essentially enabling researchers to conduct reliable system-level simulation of STT-MRAM using widely accepted existing simulation infrastructure. The results show a fairly narrow overall performance deviation in response to significant variations in key timing parameters, and the power consumption experiments identify the key power component that is mostly affected with STT-MRAM.

Smart Ticketing System for Public Transport Vehicles

Recent Growth in technologies has taken drastic improvements in all fields especially public welfare. Soon transport systems with demanding technologies like frequency Identification Devices (RFID), GSM, and face recognition will gain the spotlight. The RFID concept is applied in a public transport identification card which is a reliable system, automatically detects the passenger, and the camera will recognize the passenger’s face and debit the fare following the distance traveled. A feedback message is forwarded to the corresponding person’s mobile, as a sign of good security. The security system is equipped with a GSM modem.IR sensor will count the persons entering and exiting the bus.

In Pursuing Better Academic Result In University: A Case of Fuzzy Logic Analysis

A fuzzy logic approach is applied in this proposed system as a method to predict the performance student in pursuing better academic results in university. Fuzzy logic is used because the technique is suitable for statistical database as well as suitable to obtain general classification between excellence and moderate students. The main issue in this project is the difficulties to predict the student’s performance and to sustain their result. The fuzzy logic approach is suitable for data classification and the performance will be analyzed by using Matlab simulink. Besides that, several difference methods of membership were also been investigated in order to design and propose the most stable and reliable system. Based on the results obtained from simulation, it has provided meaningful characteristics that are significant and able to advice student getting better grades in academicals program (BEE & BEP). Moreover, the system will provide better study to student whose do not understand the university system during their early years in university.

Clarifying the Interpretation and Use of the LOLE Resource Adequacy Metric

The loss-of-load expectation (LOLE) risk metric has been used in probabilistic power system resource adequacy assessment for over 70 years, and today is one of the most recognizable and widely-used measures of system shortfall risk. However, this wide adoption has been accompanied by ambiguities and inconsistencies in its definition and application. This paper provides a unifying reference for defining the metric as it relates to modern analyses, while clarifying a number of common points of confusion in its application. In particular, the paper clarifies that LOLE is not a measure of expected total shortfall duration, a 2.4 hours per year LOLE target implies a less reliable system than a 1 day in 10 years (0.1 days per year) LOLE target, and exact conversions between hourly and daily LOLE targets are not generally possible. Illustrative examples are provided to help explain each of these points.

Clarifying the Interpretation and Use of the LOLE Resource Adequacy Metric

The loss-of-load expectation (LOLE) risk metric has been used in probabilistic power system resource adequacy assessment for over 70 years, and today is one of the most recognizable and widely-used measures of system shortfall risk. However, this wide adoption has been accompanied by ambiguities and inconsistencies in its definition and application. This paper provides a unifying reference for defining the metric as it relates to modern analyses, while clarifying a number of common points of confusion in its application. In particular, the paper clarifies that LOLE is not a measure of expected total shortfall duration, a 2.4 hours per year LOLE target implies a less reliable system than a 1 day in 10 years (0.1 days per year) LOLE target, and exact conversions between hourly and daily LOLE targets are not generally possible. Illustrative examples are provided to help explain each of these points.

Forecasting Compound Floods in Complex Coastal Regions

Coastal communities face more frequent floods in which rain, rivers, and ocean storm surge combine forces. A reliable system that accurately predicts inundation from these events is urgently needed.

ECS an Endeavor Towards Providing Similar Cache Reliability Behavior in Different Programs

<p>The reliability of embedded processors is one of the major concerns in safety-critical applications. Reliability is particularly expressed within the cache memories which are the largest part of new system on chips. Cache memories are the most vulnerable parts of the embedded systems and can affect the reliability drastically especially in deep transistor scaling. Therefore, evaluating the cache vulnerability is crucial in the design of a reliable system especially for safety-critical applications. It has been shown that using the same cache sizes for different programs leads to incompatible vulnerability patterns in them. According to the literature, most of the related researches, have exploited identical cache sizes for different programs in their reliability evaluations, while the cache reliability strictly depends on the cache size and program behavior. Traditional attempts for finding an appropriate cache size for different programs would need a huge design space exploration. In this work, we have introduced a criterion for determining the Effective Cache Size (ECS) for embedded processors which considers the inherent programs’ reliability and performance properties. According to the results, using the ECS for the representative benchmark applications, the reliability would be increased 43x on average with acceptable performance degradations (21% on average).</p>

Malaria Diagnosis in Non-Endemic Settings: The European Experience in the Last 22 Years

Accurate, prompt, and reliable tools for the diagnosis of malaria are crucial for tracking the successes or drawbacks of control and elimination efforts, and for future programs aimed at global malaria eradication. Although microscopy remains the gold standard method, the number of imported malaria cases and the risk of reappearance of autochthonous cases stimulated several laboratories located in European countries to evaluate methods and algorithms suited to non-endemic settings, where skilled microscopists are not always available. In this review, an overview of the field evaluation and a comparison of the methods used for the diagnosis of malaria by European laboratories is reported, showing that the development of numerous innovations is continuous. In particular, the combination of rapid diagnostic tests and molecular assays with microscopy represents a reliable system for the early diagnosis of malaria in non-endemic settings.

ECS an Endeavor Towards Providing Similar Cache Reliability Behavior in Different Programs

<p>The reliability of embedded processors is one of the major concerns in safety-critical applications. Reliability is particularly expressed within the cache memories which are the largest part of new system on chips. Cache memories are the most vulnerable parts of the embedded systems and can affect the reliability drastically especially in deep transistor scaling. Therefore, evaluating the cache vulnerability is crucial in the design of a reliable system especially for safety-critical applications. It has been shown that using the same cache sizes for different programs leads to incompatible vulnerability patterns in them. According to the literature, most of the related researches, have exploited identical cache sizes for different programs in their reliability evaluations, while the cache reliability strictly depends on the cache size and program behavior. Traditional attempts for finding an appropriate cache size for different programs would need a huge design space exploration. In this work, we have introduced a criterion for determining the Effective Cache Size (ECS) for embedded processors which considers the inherent programs’ reliability and performance properties. According to the results, using the ECS for the representative benchmark applications, the reliability would be increased 43x on average with acceptable performance degradations (21% on average).</p>