scholarly journals A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 3041
Author(s):  
Guozheng Zhang ◽  
Yingjie Su ◽  
Zhanqing Zhou ◽  
Qiang Geng
Keyword(s):  
Pulse Width Modulation ◽  
Control Method ◽  
Balance Control ◽  
Neutral Point ◽  
Switching Loss ◽  
Major Drawback ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Zero Sequence ◽  
Zero Sequence Voltage

For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

scholarly journals A Novel Neutral-Point Potential Balance Strategy for Three-Level NPC Back-to-Back Converter Based on the Neutral-Point Current Injection Model

2015 ◽  
Vol 2015 ◽  
pp. 1-12 ◽  
Author(s):  
Yingjie Wang ◽  
Haiyuan Liu ◽  
Wenchao Wang ◽  
Kangan Wang
Keyword(s):  
Balance Control ◽  
Neutral Point ◽  
Control Algorithms ◽  
Model Based ◽  
Point Potential ◽  
Injection Model ◽  
Zero Sequence ◽  
Flow Through ◽  
Dc Bus ◽  
Zero Sequence Voltage

The neutral-point (NP) potential balance control in three-level neutral-point-clamped (NPC) back-to-back converter is a research nodus. Its current strategies are the same as the strategies of a single three-level NPC converter. But the strategies do not give full play to its advantages that the neutral-point current can only flow through the connected midlines in both sides of the converter but does not flow through the DC-bus capacitors. In this paper, firstly the NP potential model based on the NP current injected is proposed. It overcomes numerous variable constraints and mutual coupling in the conventional model based on the zero-sequence voltage injected. And then on this basis, three NP-potential balance control algorithms, unilateral control, bilateral independent control, and bilateral coordinated control, are proposed according to difference requirements. All of these algorithms use the midlines rather than the DC-bus capacitors to flow the NP current as much as possible. Their control abilities are further quantitatively analyzed and compared. Finally, simulation results verify the validity and effectiveness of these algorithms.

scholarly journals Analysis of Effective Three-Level Neutral Point Clamped Converter System for the Bipolar LVDC Distribution

Electronics ◽  
2019 ◽  
Vol 8 (6) ◽  
pp. 691 ◽  
Author(s):  
Ju-Yong Kim ◽  
Ho-Sung Kim ◽  
Ju-Won Baek ◽  
Dong-Keun Jeong
Keyword(s):  
Distribution System ◽  
Low Voltage ◽  
Balance Control ◽  
Short Circuit ◽  
Renewable Energy Sources ◽  
Neutral Point ◽  
Extreme Load ◽  
Zero Sequence ◽  
Zero Sequence Voltage ◽  
Short Circuit Condition

Low-voltage direct current (LVDC) distribution has attracted attention due to increased DC loads, the popularization of electric vehicles, energy storage systems (ESS), and renewable energy sources such as photovoltaic (PV). This paper studies a ±750 V bipolar DC distribution system and applies a 3-level neutral-point clamped (NPC) AC/DC converter for LVDC distribution. However, the 3-level NPC converter is fundamental in the neutral-point (NP) imbalance problem. This paper discusses the NP balance control method using zero-sequence voltage among various solutions to solve NP imbalance. However, since the zero-sequence voltage for NP balance control is limited, the NP voltage cannot be controlled to be balanced when extreme load differences occur. To maintain microgrid stability with bipolar LVDC distribution, it is necessary to control the NP voltage balance, even in an imbalance of extreme load. In addition, due to the bipolar LVDC distribution, the pole where a short-circuit condition occurs limits the short current until the circuit breaker operates, and a pole without a short-circuit condition must supply a stable voltage. Since the conventional 3-level NPC AC/DC converter alone cannot satisfy both functions, an additional DC/DC converter is proposed, analyzed, and verified. This paper is about a 3-level NPC AC/DC converter system for LVDC distribution. It can be used for the imbalance and short-circuit condition in bipolar LVDC distribution through the prototype of the 300 kW 3-level NPC AC/DC converter system and experimented and verified in various conditions.

scholarly journals A Virtual Negative Resistor Based Common Mode Current Resonance Suppression Method for Three-Level Grid-Tied Inverter with Discontinuous PWM

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1595
Author(s):  
Qiyu Li ◽  
Hongwei Zhou ◽  
Jiansong Zhang ◽  
Shengdun Zhao ◽  
Jingfeng Lu
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Neutral Point ◽  
Resonance Problem ◽  
Common Mode ◽  
Zero Sequence ◽  
In Series ◽  
Suppression Method ◽  
Lc Filter ◽  
Control Quantity

The output LC filter of a photovoltaic (PV) string three-level grid-tied inverter that connects the filter capacitor neutral point to dc-link capacitor neutral point can reduce the common-mode (CM) current injected to the grid by letting the CM current circulate within the inverter. However, the internal CM current may resonate because of the existence of the resonant frequency of the internal CM LC circuit. Compared with the traditional continuous pulse-width modulation (CPWM), the resonance can be worse if discontinuous pulse-width modulation (DPWM) is applied, for the zero sequence quantity of DPWM contains more harmonics than that of CPWM. In this paper, a virtual negative resistor based common mode current resonance suppression method for a three-level grid-tied inverter is proposed to overcome the CM current resonance problem in DPWM application. Different positions of the virtual negative resistor in the equivalent CM circuit with different feedback variables are analyzed theoretically. The virtual negative resistor connected in series with the inductor in the equivalent CM circuit is selected to damp the CM current resonance for simplification and damping performance. Different from the implementation in CPWM where a pair of small voltage vectors exist and are used to adjust the CM voltage directly, the proposed method for DPWM application is implemented indirectly by adding the CM adjustment quantity to differential-mode (DM) control quantity with appropriate coefficients. Depending on the sector of DM control quantity in the α β reference frame, the coefficients are calculated using one of three specific voltage vectors. Experimental results are given to demonstrate the effectiveness of theoretical analyses and the proposed method.

scholarly journals A Novel Low Common-Mode Voltage Modulation Strategy for ANPC-5L Inverter

2020 ◽  
Vol 185 ◽  
pp. 01015
Author(s):  
Fusheng Wang ◽  
Sai Weng ◽  
Lizhong Ye ◽  
Tao Chen
Keyword(s):  
Harmonic Distortion ◽  
Output Current ◽  
Space Vector ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Zero Sequence ◽  
Implementation Method ◽  
Bus Voltage ◽  
Vector Modulation ◽  
Zero Sequence Voltage

In order to suppress the leakage current of the active neutral point clamed five-level (ANPC-5L) inverter, this paper proposes a novel low common-mode voltage (CMV) modulation strategy based on the space vector modulation thought. Only the 55 voltage vectors with low CMV amplitude instead of all 125 voltage vectors are utilized. The CMV amplitude is suppressed to one-twelfth of the DC bus voltage (Vdc). In the simplified five-level space vector diagram, “obtuse triangle” synthesis principle is used to control the CMV changes twice in each carrier cycle, and get lower output current total harmonic distortion (THD). According to the vector thought, a carrier implementation method based on zero sequence voltage injection and carrier splitting is proposed. This method simplifies the calculation and is easy to implement.Simulation results prove the correctness and feasibility of this low CMV modulation strategy.

scholarly journals Modified Modulation Strategy of 1: 1: 2 Asymmetric Nine-Level Inverter and Its Power Balance Method

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 75
Author(s):  
Manyuan Ye ◽  
Qiwen Wei ◽  
Wei Ren ◽  
Guizhi Song
Keyword(s):  
Output Power ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Low Voltage ◽  
Balance Control ◽  
Power Balance ◽  
Switching Loss ◽  
Switching Losses ◽  
Hybrid Frequency

The three unit nine-level inverter can output more voltage levels with fewer h-bridge units, while having better output waveform quality. However, in the conventional hybrid frequency modulation strategy, only one low-voltage unit adopts pulse width modulation (PWM), which causes the problem of switching loss and uneven heat distribution between the two low-voltage units. At the same time, the output power of the conventional modulation strategy is unbalanced. Aiming to resolve the above problems, a modified hybrid modulation strategy and a power balance control method under the strategy is proposed in this paper. The modulation strategy achieves output power balance between the three units and an even distribution of switching losses between the two low voltage units while maintaining the same output power quality. Simulation and experimental results verify the feasibility of the modulation strategy.

scholarly journals A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui
Keyword(s):  
Pulse Width Modulation ◽  
Neutral Point ◽  
Common Mode ◽  
Mapping Algorithm ◽  
Common Mode Voltage ◽  
Point Potential ◽  
Voltage Vector ◽  
Three Phase ◽  
Simulation And Experiment ◽  
The Common

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.

scholarly journals Common-Mode Voltage Reduction Algorithm for Photovoltaic Grid-Connected Inverters with Virtual-Vector Model Predictive Control

Electronics ◽  
2021 ◽  
Vol 10 (21) ◽  
pp. 2607
Author(s):  
Hui Hwang Goh ◽  
Xinyi Li ◽  
Chee Shen Lim ◽  
Dongdong Zhang ◽  
Wei Dai ◽  
...  
Keyword(s):  
Model Predictive Control ◽  
Predictive Control ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Dynamic Control ◽  
Single Stage ◽  
Control Technique ◽  
Vector Model ◽  
Common Mode ◽  
Common Mode Voltage

Model predictive control (MPC) has been proven to offer excellent model-based, highly dynamic control performance in grid converters. The increasingly higher power capacity of a PV inverter has led to the industrial preference of adopting higher DC voltage design at the PV array (e.g., 750–1500 V). With high array voltage, a single stage inverter offers advantages of low component count, simpler topology, and requiring less control tuning effort. However, it is typically entailed with the issue of high common-mode voltage (CMV). This work proposes a virtual-vector model predictive control method equipped with an improved common-mode reduction (CMR) space vector pulse width modulation (SVPWM). The modulation technique essentially subdivides the hexagonal voltage vector space into 18 sub-sectors, that can be split into two groups with different CMV properties. The proposal indirectly increases the DC-bus utilization and extends the overall modulation region with improved CMV. The comparison with the virtual-vector MPC scheme equipped with the conventional SVPWM suggests that the proposed technique can effectively suppress 33.33% of the CMV, and reduce the CMV toggling frequency per fundamental cycle from 6 to either 0 or 2 (depending on which sub-sector group). It is believed that the proposed control technique can help to improve the performance of photovoltaic single-stage inverters.

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