The Dissimilar Self-Alignment Characteristics of Smaller Passive Components in the Length and Width Directions

Motivation: As passive components’ size gets smaller, quality rejects due to overhang and misalignment after the reflow appear more frequently. This situation is partly because the pass-fail criterion is set based on the offset concerning the component dimensions. Therefore, understanding the self-alignment characteristics of electronic components becomes very critical for surface-mount assembly yield. This research investigates the dissimilarity of self-alignment in the length and width directions. Approach: To avoid the argument of sample to sample variations, data are collected from 81 printed circuit boards (PCB) and 182,250 assembled components. Within a PCB, 25 different solder paste printing offset locations and 81 component placement offset settings are implemented. Component-placement positions before and after the reflow are monitored. The results are compared to identify different component sizes’ self-alignment characteristics in the length and width directions. Key findings: The misalignment of smaller passive components, e.g., R0402M(0.40 mm × 0.20 mm), is worse than the larger component under the identical solder paste printing and component placement conditions. Furthermore, the self-alignment characteristic in the length direction of these passive components, e.g., R0402M, to R1005M (1.00 mm × 0.50 mm) is superior to that of width direction. The observations are not consistent with the results found in earlier research that reported on larger components, e.g., C0402M(0.40 mm × 0.20 mm), to C3216M(3.20 mm × 1.50 mm).

Investigating the Effects of Temperature, Paste Height, and Time on Solder Paste to Its Printing Performance

Due to pressure to meet consumer requirements, miniaturization, reliability, and increased functionality have become more important. To achieve good assembly of electronic devices, there must be smooth deposition of tiny and consistent paste deposits on the board which must be up to an acceptable height and volume based on desirable process parameters in the output. The printing performance of the solder paste is dependent on conditions such as paste deformation behavior, good paste roll, complete aperture filling, and paste release onto the substrate pads. Eighteen tests were performed using two types of lead-free solder paste. Three temperatures were investigated under three different time intervals. Results analysis showed that variability of the paste distribution was lowest and more uniform for paste stored at 25˚C for 48 hours. From the analysis, it is obvious that temperature has tremendous effects on the printing performance of solder paste. This study recommends 25˚C as a good temperature for solder paste printing.

An intelligent approach for improving printed circuit board assembly process performance in smart manufacturing

The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance. The critical process parameters are first identified by means of k-means clustering and the selected parameters are then used to formulate a set of experimental studies by using the multi-response Taguchi method to optimize the performance of the assembly process. To validate the proposed system, a case study of an electronics manufacturer in the solder paste printing process was conducted. The contributions of this study are two-fold: (i) pressure, blade angle and speed are identified as the critical factors in the solder paste printing process; and (ii) a significant improvement in the yield performance of PCBA can be achieved as a component in the smart manufacturing.

A method for optimizing stencil cleaning time in solder paste printing process

PurposeStencil cleaning is an important operation in solder paste printing process. Frequent cleaning may interrupt printing process and increase idle time, as well as loss for performing cleaning. This paper aims to propose a method to optimize the stencil cleaning time and reduce unnecessary cleaning operations and losses.Design/methodology/approachThis paper uses a discrete-time, discrete-state homogeneous Markov chain to model the stencil printing performance degradation process, and the quality loss during the stencil printing process is estimated based on this degradation model. A stencil cleaning decision model based on renewal reward theorem is established, and the optimal cleaning time is obtained through a balance between quality loss and the loss on idle time.FindingsA stencil cleaning decision model for solder paste printing is established, and numerical simulation results show that there exists an optimal stencil cleaning time which minimizes the long-term loss.Originality/valueStencil cleaning control is very important for solder paste printing. However, there are very few studies focusing on stencil cleaning control. This research contributes to developing a model to optimize the stencil cleaning time in solder paste printing process.

Applying the Taguchi parametric design to optimize the solder paste printing process and the quality loss function to define the specifications

Purpose This research aims to study the stencil printing process of the quad flat package (QFP) component with a pin pitch of 0.4 mm. After the optimization of the printing process, the desired inspection specification is determined to reduce the expected total process loss. Design/methodology/approach Static Taguchi parametric design is applied while considering the noise factors possibly affecting the printing quality in the production environment. The Taguchi quality loss function model is then proposed to evaluate the two types of inspection strategies. Findings The optimal parameter-level treatment for the solder paste printing process includes a squeegee pressure of 11 kg, a stencil snap-off of 0.14 mm, a cleaning frequency of the stencil once per printing and using an air gun after stencil wiping. The optimal upper and lower specification limits are 119.8 µm and 110.3 µm, respectively. Originality/value Noise factors in the production environment are considered to determine the optimal printing process. For specific components, the specification is established as a basis for subsequent processes or reworks.