scholarly journals The Dissimilar Self-Alignment Characteristics of Smaller Passive Components in the Length and Width Directions

2021 ◽  
Vol 34 (2) ◽  
pp. 7-15
Author(s):  
Jingxi He ◽  
Yuqiao Cen ◽  
Yuanyuan Li ◽  
Seungbae Park ◽  
Daehan Won

Motivation: As passive components’ size gets smaller, quality rejects due to overhang and misalignment after the reflow appear more frequently. This situation is partly because the pass-fail criterion is set based on the offset concerning the component dimensions. Therefore, understanding the self-alignment characteristics of electronic components becomes very critical for surface-mount assembly yield. This research investigates the dissimilarity of self-alignment in the length and width directions. Approach: To avoid the argument of sample to sample variations, data are collected from 81 printed circuit boards (PCB) and 182,250 assembled components. Within a PCB, 25 different solder paste printing offset locations and 81 component placement offset settings are implemented. Component-placement positions before and after the reflow are monitored. The results are compared to identify different component sizes’ self-alignment characteristics in the length and width directions. Key findings: The misalignment of smaller passive components, e.g., R0402M(0.40 mm × 0.20 mm), is worse than the larger component under the identical solder paste printing and component placement conditions. Furthermore, the self-alignment characteristic in the length direction of these passive components, e.g., R0402M, to R1005M (1.00 mm × 0.50 mm) is superior to that of width direction. The observations are not consistent with the results found in earlier research that reported on larger components, e.g., C0402M(0.40 mm × 0.20 mm), to C3216M(3.20 mm × 1.50 mm).

2013 ◽  
Vol 60 (6) ◽  
pp. 2318-2331 ◽  
Author(s):  
Csaba Benedek ◽  
Olivér Krammer ◽  
Mihály Janoczki ◽  
László Jakab

2019 ◽  
Vol 1 (7) ◽  
pp. 35-41
Author(s):  
G. I. Korshunov ◽  
A. A. Petrushevskaya ◽  
P. S. Zaitsev

The article discusses the application principles of the industry 4.0 concept to improve the basic technological processes of electronics production. The problems of quality assurance in the automatic installation of printed circuit boards. Examples of the introduction optical inspections and fluoroscopy to reduce the marriage are given. The features of screen printing processes and their control using 2D and 3D inspections are considered. The location structure of the automatic optical inspection installations in the automatic line of printed wiring and communication of the automatic screen printing printer and 3D solder paste inspection is presented. A process model for the automatic installation of printed circuit boards using the elements of Industry 4.0 is presented. The organization of machine-to-machine interaction increases the automation of the system and eliminates the «human factor», as a result of which the production process is accelerated and the probability of occurrence erroneous actions resulting in nonconformities of products with standards is reduced. The tasks of organizing and certification of 3D fluoroscopy electronics, as well as the actual improving tasks the typical automatic assembly line of printed circuit boards, are considered.


Author(s):  
Erik Jung ◽  
Dirk Wojakowski ◽  
Alexander Neumann ◽  
Rolf Aschenbrenner ◽  
Herbert Reichl

The demand to miniaturize products especially for mobile applications and autonomous systems is continuing to drive the evolution of electronic products and manufacturing methods. To further the miniaturization of future products the integration of functions on miniaturized subsystems, i.e. System-in-Package (SiP) is a promising approach. Here, use of recent manufacturing methods allows to merge the SiP concept with a volumetric integration of IC’s. Up to now, most of the systems make use of single- or double-sided populated system carriers. A new challenge is to incorporate not only passive components, but as well active circuitry (IC’s) and the necessary thermal management. Ultra thin chips (i.e. silicon dies thinned down to <50μm total thickness) lend themselves to reach these goals. Chips with that thickness can be embedded in the dielectric layers of modern laminate PCB’s. Micro via technology allows to contact the embedded chip to the outer faces of the system circuitry. The aspects of embedding and making the electrical contact as well as the thermal management are highlighted. Results on FEM simulations and technical achievements are presented.


2020 ◽  
Vol 4 (3) ◽  
pp. 105
Author(s):  
Paulo E. Lopes ◽  
Duarte Moura ◽  
Loic Hilliou ◽  
Beate Krause ◽  
Petra Pötschke ◽  
...  

The increasing complexity of printed circuit boards (PCBs) due to miniaturization, increased the density of electronic components, and demanding thermal management during the assembly triggered the research of innovative solder pastes and electrically conductive adhesives (ECAs). Current commercial ECAs are typically based on epoxy matrices with a high load (>60%) of silver particles, generally in the form of microflakes. The present work reports the production of ECAs based on epoxy/carbon nanomaterials using carbon nanotubes (single and multi-walled) and exfoliated graphite, as well as hybrid compositions, within a range of concentrations. The composites were tested for morphology (dispersion of the conductive nanomaterials), electrical and thermal conductivity, rheological characteristics and deposition on a test PCB. Finally, the ECA’s shelf life was assessed by mixing all the components and conductive nanomaterials, and evaluating the cure of the resin before and after freezing for a time range up to nine months. The ECAs produced could be stored at −18 °C without affecting the cure reaction.


2009 ◽  
Vol 6 (2) ◽  
pp. 135-142
Author(s):  
Minna Arra ◽  
Esko J Pääkkönen ◽  
Ilkka Härkönen

This paper presents the results from an experimental reliability study. Two different kinds of SMD (surface mount device) components were assembled with Sn/Ag/Cu solder paste onto injection molded, thermoplastic LCP (liquid crystal polymer) substrates patterned with MID/LDS technology. Two different LCP grades were chosen for the experiments. The assembly was also realized on FR-4 PCBs (printed circuit boards), which served as control samples. The assemblies were exposed to a thermal cycling test followed by failure analysis. As predicted, failures in solder joints occurred earlier on the LCP thermoplastic substrates than on the FR-4 PCB laminates. It was noticed that with one of the LCP grades, the CTE was not the major factor determining the lifetime of the solder joints. A more prominent factor was the dimensional changes that had occurred in the substrates. An SEM/EDS (scanning electron microscope/energy dispersive spectrometry) analysis on the microstructure of the LCP substrates was performed to explain the findings. The analysis showed that there were differences in the detailed microstructure between the two LCP grades. These differences seemed to be related to the different filler particles.


2021 ◽  
Author(s):  
Jingxi He ◽  
Yuqiao Cen ◽  
Yuanyuan Li ◽  
Shrouq Alelaumi ◽  
Daehan Won

Abstract This paper aims to propose a novel placing method, i.e., place-between-paste-and-pad (PB), for mini-scale passive components to enhance electronic assembly lines' yield. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads' center on the width direction. An experiment that involves 12 printed circuit boards (PCB) is designed and conducted to get comparative results. Four PCBs are employed for place-on-pad (PP), place-on-paste (PPS), and PB separately. On each board, 375 resistors R0402M (0.40 mm X 0.20 mm) are assembled horizontally. To study the components' misalignment under various solder paste offset conditions in different placement methods, a stencil with 25 solder paste offset settings is utilized. Based on this experiment's results, PB has superior performance to the other two methods to minimize components' misalignment. Regarding the number of acceptable components when post-reflow offsets are within 25% of components' dimensions, PB and PP have equivalent performances, and they both outperform PPS. Furthermore, PB is a low-cost placing strategy because PB needs not the real-time communication between the solder paste inspection machine and the pick-and-place machine. With the miniaturization trend in electronic products, the post-reflow components' misalignment is more frequently observed than before. The placement method proposed in this study is expected to offer a low-cost exploration in the component pick-and-place procedure to enhance the surface mount technology (SMT) assembly quality.


2008 ◽  
Vol 1113 ◽  
Author(s):  
Beihai Ma ◽  
Manoj Narayanan ◽  
U. Balachandran

ABSTRACTFerroelectric film-on-foil capacitors hold special promise to replace discrete passive components in the development of electronic devices that require greater performance and smaller size. We have deposited Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films on base metal foils to form film-on-foil capacitor sheets that can be embedded into printed circuit boards. The rootmean-square surface roughness was determined to be ≍3 nm for 1.15-μm-thick PLZT films on LaNiO3-buffered Ni foils. The following dielectric properties were measured: relative permittivity of ≍1300 and dielectric loss (tan δ) of ≍0.05, leakage current density of 6.6 × 10−9 A/cm2 at 25°C and 1.4 × 10−8 A/cm2 at 150°C, and mean breakdown strength >2.5 MV/cm. A remnant polarization (Pr) of ≍33 μC/cm2 and coercive field strength (Ec) of ≍50 kV/cm were observed with a maximum voltage of 300 V applied during the P-E loop measurement. The energy storage capability of the dielectric film is ≍45 J/cm3.


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