Spin-Transistor Technology for Spintronics/CMOS Hybrid Logic Circuits and Systems

2016 ◽  
pp. 65-90 ◽  
Author(s):  
Satoshi Sugahara ◽  
Yusuke Shuto ◽  
Shuu'ichirou Yamamoto
Keyword(s):  
Logic Circuits ◽  
Hybrid Logic ◽  
Spin Transistor

Emerging hybrid logic circuits based on non-volatile magnetic memories

2013 ◽  
Author(s):  
Weisheng Zhao ◽  
Guillaume Prenat ◽  
Jacques-Olivier Klein ◽  
Bernard Dieny ◽  
Claude Chappert ◽  
...  
Keyword(s):  
Logic Circuits ◽  
Hybrid Logic

High Speed, High Stability and Low Power Sensing Amplifier for MTJ/CMOS Hybrid Logic Circuits

2009 ◽  
Vol 45 (10) ◽  
pp. 3784-3787 ◽  
Author(s):  
Weisheng Zhao ◽  
C. Chappert ◽  
V. Javerliac ◽  
J.-P. Noziere
Keyword(s):  
Low Power ◽  
High Speed ◽  
High Stability ◽  
Logic Circuits ◽  
Hybrid Logic

scholarly journals Design and Evaluation of a 32-bit Carry Select Adder using 4-bit Hybrid CLA Adder

2021 ◽  
Vol 20 (2) ◽  
pp. 1-7
Author(s):  
Muhammad Saddam Hossain ◽  
Farhadur Arifin
Keyword(s):  
Power Consumption ◽  
Design Methodology ◽  
Arithmetic Operation ◽  
Logic Circuits ◽  
Hybrid Logic ◽  
Basic Unit ◽  
Improve Performance ◽  
Look Ahead ◽  
Carry Select Adder ◽  
Critical Paths

Adder circuits play a remarkable role in modern microprocessor. Adders are widely used in critical paths of arithmetic operation such as multiplication and subtraction. A Carry Select Adder (CSA) design methodology using a modified 4-bit Carry Look-Ahead (CLA) Adder has been proposed in this research. The proposed 4-bit CLA used hybrid logic style based logic circuits for Carry Generate (Gi) and Carry Propagate (Pi) functions in order to improve performance and reduce the number of transistor used. The modified 4-bit CLA is used as the basic unit for implementation of 32-bit CSA. The proposed design of hybrid CLA based 32-bit CSA has been compared with conventional static CMOS based 32-bit CSA and 32-bit Ripple Cary Adder (RCA) by conducting simulation using Cadence Virtuoso. Power consumption and delay in the proposed 32-bit CSA found 322.6 (uW) and 0.556 (ns) whereas power and delay in the conventional 32-bit CSA was 455.4 (uW) and 0.667 (ns) respectively. We have done all the simulation using Cadence Virtuoso 90 nm tool.

Fault effects in asynchronous sequential logic circuits

1993 ◽  
Vol 140 (6) ◽  
pp. 327-332
Author(s):  
M.-D. Shieh ◽  
C.-L. Wey ◽  
P.D. Fisher
Keyword(s):  
Logic Circuits ◽  
Sequential Logic

DIGITALIZATION OF LABOR MIGRATION PROCESSES IN UZBEKISTAN. WORLD EXPERIENCE

2020 ◽  
Vol 4 (3) ◽  
pp. 29-39
Author(s):  
Sulkhiya Gazieva ◽  
Keyword(s):  
Labor Market ◽  
Technological Change ◽  
Labor Migration ◽  
Smart Phone ◽  
Logic Circuits ◽  
Digital Logic ◽  
The Internet ◽  
The Future

The future of labor market depends upon several factors, long-term innovation and the demographic developments. However, one of the main drivers of technological change in the future is digitalization and central to this development is the production and use of digital logic circuits and its derived technologies, including the computer,the smart phone and the Internet. Especially, smart automation will perhaps not cause e.g.regarding industries, occupations, skills, tasks and duties

Case Studies in Atomic Force Probe Analysis

2006 ◽  
Author(s):  
Randal Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Light Emission ◽  
Electrical Characterization ◽  
Logic Circuits ◽  
Contrast Imaging ◽  
Atomic Force ◽  
Measuring Surface ◽  
Analysis Environment

Abstract The use of atomic force probe (AFP) analysis in the analysis of semiconductor devices is expanding from its initial purpose of solely characterizing CMOS transistors at the contact level with a parametric analyzer. Other uses found for the AFP include the full electrical characterization of failing SRAM bit cells, current contrast imaging of SOI transistors, measuring surface roughness, the probing of metallization layers to measure leakages, and use with other tools, such as light emission, to quickly localize and identify defects in logic circuits. This paper presents several case studies in regards to these activities and their results. These case studies demonstrate the versatility of the AFP. The needs and demands of the failure analysis environment have quickly expanded its use. These expanded capabilities make the AFP more valuable for the failure analysis community.

Sign in / Sign up

Export Citation Format

Share Document