A Single Photon Avalanche Diode Array Fabricated in Deep-Submicron CMOS Technology

Author(s):  
Cristiano Niclass ◽  
Maximilian Sergio ◽  
Edoardo Charbon
2012 ◽  
Vol 47 (6) ◽  
pp. 1394-1407 ◽  
Author(s):  
Marek Gersbach ◽  
Yuki Maruyama ◽  
Rahmadi Trimananda ◽  
Matt W. Fishburn ◽  
David Stoppa ◽  
...  

2015 ◽  
Author(s):  
Vitali Savuskan ◽  
Claudio Jakobson ◽  
Tomer Merhav ◽  
Avi Shoham ◽  
Igor Brouk ◽  
...  

2011 ◽  
Author(s):  
Justin A. Richardson ◽  
Eric A. G. Webster ◽  
Lindsay A. Grant ◽  
Robert K. Henderson

2019 ◽  
Vol 33 (09) ◽  
pp. 1950099
Author(s):  
Wei Wang ◽  
Guang Wang ◽  
Hongan Zeng ◽  
Yuanyao Zhao ◽  
U-Fat Chio ◽  
...  

A single photon avalanche diode (SPAD) structure designed with standard 180 nm CMOS technology is investigated in detail. The SPAD employs a [Formula: see text]-well anode, rather than the conventional [Formula: see text] layer, and with a [Formula: see text]-well/deep [Formula: see text]-well junction with square shape, a deep retrograde [Formula: see text]-well virtual guard ring which prevents the premature edge avalanche breakdown. The analytical and simulation results show that the SPAD exhibits a uniform electric field distribution in [Formula: see text]-well/deep [Formula: see text]-well junction with the active area of [Formula: see text], and the avalanche breakdown voltage is as low as 9 V, the peak of the photon detection efficiency (PDE) is about 33% at 500 nm, the relatively low dark count rate (DCR) of 0.66 KHz at room temperature is obtained.


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